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74LV10PW

Description
NAND Gate, CMOS, PDSO14,
Categorylogic    logic   
File Size87KB,3 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
Download Datasheet Parametric View All

74LV10PW Overview

NAND Gate, CMOS, PDSO14,

74LV10PW Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instructionTSSOP, TSSOP14,.25
Reach Compliance Codeunknown
JESD-30 codeR-PDSO-G14
JESD-609 codee0
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.008 A
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply3.3 V
Prop。Delay @ Nom-Sup26 ns
Certification statusNot Qualified
Schmitt triggerNO
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Base Number Matches1
This Material Copyrighted By Its Respective Manufacturer
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