87324-462LF datasheet, PDF - EEWORLD Datasheet

87324-462LF: DescriptionBoard Connector, 62 Contact(s), 2 Row(s), Male, Straight, Solder Terminal, LEAD FREE; CategoryThe connector The connector; File Size621KB，7 Pages; ManufacturerAmphenol; Websitehttp://www.amphenol.com/; Environmental Compliance

Download Datasheet Parametric View All

87324-462LF Overview

Board Connector, 62 Contact(s), 2 Row(s), Male, Straight, Solder Terminal, LEAD FREE

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Amphenol
package instruction	LEAD FREE
Reach Compliance Code	compliant
Connector type	BOARD CONNECTOR
Contact to complete cooperation	TIN (100) OVER NICKEL
Contact completed and terminated	TIN (100) OVER NICKEL
Contact point gender	MALE
Contact material	PHOSPHOR BRONZE
DIN compliance	NO
Filter function	NO
IEC compliance	NO
JESD-609 code	e3
MIL compliance	NO
Manufacturer's serial number	87324
Mixed contacts	NO
Installation method	STRAIGHT
Installation type	BOARD
Number of rows loaded	2
Options	GENERAL PURPOSE
Terminal pitch	2.54 mm
Termination type	SOLDER
Total number of contacts	62
UL Flammability Code	94V-0
Base Number Matches	1

PDM: Rev:CW

STATUS:

Released

Printed: May 18, 2011

Embedded fingerprint recognition system: Has anyone done embedded fingerprint recognition? Can you send the relevant information to my email address collegeml@gmail.com? I have searched the Internet for a long time but have no clue. Thank yo...; slevin Embedded System

EEWORLD University Hall ---- Learn HLS with me: Learn HLS with me : https://training.eeworld.com.cn/course/4854This series of teaching videos is led by Xilinx senior strategic application engineers to guide you from scratch, step by step to master ...; 抛砖引玉 FPGA/CPLD

The ip core generates RAM, perfect simulation, but there are still some small details I would like to ask the masters: [i=s] This post was last edited by 调戏、和尚/ on 2015-7-29 20:43 [/i] [postbg]bg8.png[/postbg][size=3][b]Single-port RAM 1024*8 size generated by IP core[/b][/size] The simulation diagram has come out, it...; 调戏、和尚/ FPGA/CPLD

Unpack and evaluate to win prizes - you are just one unpacking away from truly owning it!: [font=微软雅黑][size=3]What have you taken apart recently? Why? To repair? To modify? [/size][/font][font=微软雅黑][size=3]Or just to take it apart to find out what it is, and to improve your own hands-on ski...; eric_wang Making friends through disassembly

Please introduce the specific model of DSP: Please introduce the specific model of DSPMy requirements are as follows: 1. Main frequency 50M+; 2. ADC channels 8+, accuracy 8-12 bits (preferably adjustable, like MSP430), internal resistance shoul...; shushu DSP and ARM Processors

Why can't SPI0i be enabled?: I used the manufacturer's SPI example to test, but the program could not run. After checking line by line, I found that the program paused when it reached SPI0_enable. I could run past this line in th...; hujj GD32 MCU

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components