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74F20SJ

Description
Dual 4-Input NAND Gate
Categorylogic    logic   
File Size49KB,4 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74F20SJ Overview

Dual 4-Input NAND Gate

74F20SJ Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP14,.3
Contacts14
Reach Compliance Codecompli
seriesF/FAST
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length10.2 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.02 A
Humidity sensitivity level1
Number of functions2
Number of entries4
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply5 V
Maximum supply current (ICC)5.1 mA
Prop。Delay @ Nom-Su6 ns
propagation delay (tpd)6 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height2.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width5.3 mm
Base Number Matches1
74F20 Dual 4-Input NAND Gate
April 1988
Revised July 1999
74F20
Dual 4-Input NAND Gate
General Description
This device contains two independent gates, each of which
performs the logic NAND function.
Ordering Code:
Order Number
74F20SC
74F20SJ
74F20PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
U.L.
Pin Names
A
n
, B
n
, C
n
, D
n
O
n
Description
HIGH/LOW
Inputs
Outputs
1.0/1.0
50/33.3
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µA/−0.6
mA
−1
mA/20 mA
© 1999 Fairchild Semiconductor Corporation
DS009462
www.fairchildsemi.com

74F20SJ Related Products

74F20SJ 74F20 74F20PC 74F20SC
Description Dual 4-Input NAND Gate Dual 4-Input NAND Gate Dual 4-Input NAND Gate Dual 4-Input NAND Gate
Is it Rohs certified? conform to - conform to conform to
Maker Fairchild - Fairchild Fairchild
Parts packaging code SOIC - DIP SOIC
package instruction SOP, SOP14,.3 - DIP, DIP14,.3 SOP, SOP14,.25
Contacts 14 - 14 14
Reach Compliance Code compli - unknow unknown
series F/FAST - F/FAST F/FAST
JESD-30 code R-PDSO-G14 - R-PDIP-T14 R-PDSO-G14
JESD-609 code e3 - e3 e3
length 10.2 mm - 19.18 mm 8.65 mm
Load capacitance (CL) 50 pF - 50 pF 50 pF
Logic integrated circuit type NAND GATE - NAND GATE NAND GATE
MaximumI(ol) 0.02 A - 0.02 A 0.02 A
Number of functions 2 - 2 2
Number of entries 4 - 4 4
Number of terminals 14 - 14 14
Maximum operating temperature 70 °C - 70 °C 70 °C
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP - DIP SOP
Encapsulate equivalent code SOP14,.3 - DIP14,.3 SOP14,.25
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE - IN-LINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 - NOT APPLICABLE 260
power supply 5 V - 5 V 5 V
Maximum supply current (ICC) 5.1 mA - 5.1 mA 5.1 mA
propagation delay (tpd) 6 ns - 6 ns 6 ns
Certification status Not Qualified - Not Qualified Not Qualified
Schmitt trigger NO - NO NO
Maximum seat height 2.1 mm - 5.08 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V - 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V - 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V - 5 V 5 V
surface mount YES - NO YES
technology TTL - TTL TTL
Temperature level COMMERCIAL - COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING - THROUGH-HOLE GULL WING
Terminal pitch 1.27 mm - 2.54 mm 1.27 mm
Terminal location DUAL - DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT APPLICABLE NOT SPECIFIED
width 5.3 mm - 7.62 mm 3.9 mm
Base Number Matches 1 - 1 1
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