INTEGRATED CIRCUITS
74F298
Quad 2-input multiplexer with storage
Product specification
IC15 Data Handbook
1989 Aug 14
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input multiplexer with storage
74F298
FEATURES
•
Fully synchronous operation
•
Select from two data sources
•
Buffered, negative edge triggered clock
•
Provides the equivalent of function capabilities of two separate
MSI functions (74F157 and 74F175)
PIN CONFIGURATION
I1b
I1a
I0a
I0b
I1c
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
Qa
Qb
Qc
Qd
CP
S
I0c
DESCRIPTION
The 74F298 is a high speed Quad 2-Input Multiplexer with storage.
It selects 4 bits of data from two sources (ports) under the control of
a common Select input (S). The selected data is transferred to the
4-bit output register synchronous with the High-to-Low transition of
the clock (CP). The 4-bit register is fully edge triggered. The data
inputs (I0 and I1) and Select input (S) must be stable only one setup
time prior to the High-to-Low transition of the clock for predictable
operation.
TYPE
74F298
I1d
I0d
GND
SF00859
TYPICAL f
MAX
115MHz
TYPICAL
SUPPLY CURRENT
(TOTAL)
30mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F298N
N74F298D
PKG DWG #
16-pin plastic DIP
16-pin plastic SO
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
I0a, I0b, I0c, I0d
I1a, I1b, I1c, I1d
S
CP
Qa, Qb, Qc, Qd
DESCRIPTION
Data inputs
Data inputs
Select input
Clock input (active falling edge)
Data outputs
74F (U.L.) HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33
LOAD VALUE HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
3
2
4
1
9
5
7
6
LOGIC SYMBOL (IEEE/IEC)
11
10
C1
M2
3
I0a I1a I0b
10
11
S
CP
Qa
Qb
Qc
Qd
I1b
I0c
I1c
I0d I1d
2
4
1
9
2, 1D
2, 1D
15
14
13
5
7
12
V
CC
= Pin 16
GND = Pin 8
15
14
13
12
6
SF00860
SF00861
1989 Aug 14
2
853–0061 97377
Philips Semiconductors
Product specification
Quad 2-input multiplexer with storage
74F298
LOGIC DIAGRAM
I1a
2
S
10
I0a
3
I1b
1
I0b
4
I1c
5
I0c
9
I1d
6
I0d
7
CP
11
R
CP
S
Qa
15
Qa
R
CP
S
Qb
14
Qb
R
CP
S
Qc
13
Qc
R
CP
S
Qd
12
Qd
V
CC
= Pin 16
GND = Pin 8
SF00862
FUNCTION TABLE
INPUTS
CP
↓
↓
↓
↓
H
h
L
l
X
↓
=
=
=
=
=
=
S
l
l
h
h
I0n
l
h
X
X
I1n
X
X
l
h
OUTPUT
Qn
L
H
L
H
Load source “1”
Load source “0”
OPERATING MODE
High voltage level
High voltage level one setup time prior to the High-to-Low
clock transition
Low voltage level
Low voltage level one setup time prior to the High-to-Low
clock transition
Don’t care
High-to-Low clock transition
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
1989 Aug 14
3
Philips Semiconductors
Product specification
Quad 2-input multiplexer with storage
74F298
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–1
20
70
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
NO TAG
MIN
V
CC
= MIN, V
IL
= MAX,
,
,
V
IH
= MIN, I
OH
= –MAX
V
CC
= MIN, V
IL
= MAX,
,
,
V
IH
= MIN, I
OL
=– MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX
–60
30
32
TYP
NO TAG
UNIT
MAX
V
V
O
OH
High-level
High level output voltage
±
10%V
CC
±
5%V
CC
±
10%V
CC
±
5%V
CC
2.5
2.7
3.4
0.30
0.30
–0.73
0.50
0.50
–1.2
100
20
–0.6
–150
40
40
V
V
V
V
µA
µA
mA
mA
mA
mA
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Short-circuit output current
NO TAG
Supply current (total)
I
CCH
I
CCL
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
TEST
CONDITION
MIN
f
MAX
t
PLH
t
PHL
Maximum clock frequency
Propagation delay
CP tp Qn
Waveform
NO TAG
Waveform
NO TAG
110
4.0
4.5
T
amb
= +25°C
V
CC
= +5.0V
C
L
= 50pF
R
L
= 500Ω
TYP
115
5.5
6.5
7.5
8.5
MAX
T
amb
= 0°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF
R
L
= 500Ω
MIN
105
4.0
4.5
9.0
9.5
MAX
ns
ns
SYMBOL
PARAMETER
UNIT
1989 Aug 14
4
Philips Semiconductors
Product specification
Quad 2-input multiplexer with storage
74F298
AC SETUP REQUIREMENTS
LIMITS
TEST
CONDITION
MIN
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
Setup time, High or Low
I0n, I1n to CP
Hold time, High or Low
I0n, I1n to CP
Setup time, High or Low
S to CP
Hold time, High or Low
S to CP
CP Pulse width,
High or Low
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
2.0
2.0
1.0
1.0
6.0
5.0
0
0
5.0
5.0
T
amb
= +25°C
V
CC
= +5.0V
C
L
= 50pF
R
L
= 500Ω
TYP
MAX
T
amb
= 0°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF
R
L
= 500Ω
MIN
2.0
2.0
1.0
1.0
7.0
6.0
0
0
5.0
7.0
MAX
ns
ns
ns
ns
ns
SYMBOL
PARAMETER
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
Ion, I1n, S
V
M
CP
V
M
t
W
(L)
t
PLH
Q
n
V
M
t
W
(H)
t
PHL
V
M
CP
V
M
V
M
V
M
t
s
(H)
V
M
t
h
(H)
t
s
(L)
V
M
V
M
t
h
(L)
SF00863
SF00864
Waveform 1. Clock Input to Output, Clock Pulse Width, and
Maximum Clock Frequency
Waveform 2. Data Setup and Hold Times
TEST CIRCUIT AND WAVEFORMS
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
1989 Aug 14
5
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