Philips Semiconductors
Product specification
Bus interface registers
74F821/822/823/824/825/826
74F821
74F822
74F823
74F824
74F825
74F826
10-bit bus interface register, non-inverting (3-State)
10-bit bus interface register, inverting (3-State)
9-bit bus interface register, non-inverting (3-State)
9-bit bus interface register, inverting (3-State)
8-bit bus interface register, non-inverting (3-State)
8-bit bus interface register, inverting (3-State)
DESCRIPTION
The 74F821 series bus interface registers are designed to
eliminate the extra packages required to buffer existing registers and
provide extra data width for wider data/address paths of busses
carrying parity.
The 74F821/74F822 are buffered 10-bit wide versions of the popular
74F374/74F534 functions.
The 74F822 is the inverted output version of 74F821.
The 74F823 and 74F824 are 9-bit wide buffered registers with clock
enable (CE) and master reset (MR) which are ideal for parity bus
interfacing in high microprogrammed systems.
The 74F824 is the inverted version of 74F823.
The 74F825 and 74F826 are 8-bit buffered registers with all the
74F823/74F824 controls plus output enable (OE0, OE1, OE2) to
allow multiuser control of the interface, e.g., CS, DMA, and RD/WR.
They are ideal for uses as an output port requiring high I
OL
/I
OH
.
The 74F826 is the inverted version of 74F825.
TYPICAL
f
max
180MHz
180MHz
180MHz
TYPICAL
SUPPLY CURRENT
(TOTAL)
75mA
70mA
65mA
FEATURES
flip-flops
•
High speed parallel registers with positive edge-triggered D-type
•
High performance bus interface buffering for wide data/address
paths or busses carrying parity
•
High impedance PNP base inputs for reduced loading (20µA in
high and low states)
•
I
IL
is 20µA vs 1000µA for AM29821 series
•
Buffered control inputs to reduce AC effects
•
Ideal where high speed, light loading, or increased fan-in as
required with MOS microprocessor
•
Positive and negative over-shoots are clamped to ground
•
3-State outputs glitch free during power-up and power-down
•
Slim Dip 300 mil package
•
Broadside pinout compatible with AMD AM 29821-29826 series
•
Outputs sink 64mA and source 24mA
•
Industrial temperature range available (–40°C to +85°C) for
74F823
TYPE
74F821, 74F822
74F823, 74F824
74F825, 74F826
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F821N, N74F822N, N74F823N,
N74F824N, N74F825N, N74F826N
N74F821D, N74F822D, N74F823D,
N74F824D, N74F825D, N74F826D
INDUSTRIAL RANGE
V
CC
= 5V
±10%,
T
amb
= –40°C to +85°C
I74F823N
I74F823D
PKG. DWG. #
24-pin plastic slim DIP (300mil)
24-pin plastic SOL
SOT222-1
SOT137-1
1996 Jan 05
2
853-1304 16195
Philips Semiconductors
Product specification
Bus interface registers
74F821/822/823/824/825/826
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
Dn
74F821
74F822
CP
OE
Qn, Qn
Dn
CP
74F823
74F824
CE
MR
OE
Qn, Qn
Dn
CP
74F825
74F826
CE
MR
OE
Qn, Qn
Data inputs
Clock input
Output enable input (active low)
Data outputs
Data inputs
Clock input
Clock enable input (active low)
Master reset input (active low)
Output enable input (active low)
Data outputs
Data inputs
Clock input
Clock enable input (active low)
Master reset input (active low)
Output enable input (active low)
Data outputs
DESCRIPTION
74F (U.L.)
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/3.0
1200/106.7
1.0/1.0
1.0/1.0
1.0/3.0
1.0/3.0
1.0/3.0
1200/106.7
1.0/1.0
1.0/1.0
1.0/3.0
1.0/3.0
1.0/3.0
1200/106.7
LOAD VALUE
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/1.8mA
24mA/64mA
20µA/0.6mA
20µA/0.6mA
20µA/1.8mA
20µA/1.8mA
20µA/1.8mA
24mA/64mA
20µA/0.6mA
20µA/0.6mA
20µA/1.8mA
20µA/1.8mA
20µA/1.8mA
24mA/64mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
PIN CONFIGURATION – 74F821
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
D8 10
D9 11
GND 12
24 V
CC
23 Q0
22 Q1
21 Q2
20 Q3
19 Q4
18 Q5
17 Q6
16 Q7
15 Q8
14 Q9
13 CP
LOGIC SYMBOL – 74F821
2
3
4
5
6
7
8
9
10
11
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
13
1
CP
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9
V
CC
= Pin 24
GND = Pin 12
23
22
21
20
19
18
17
16
15
14
SF00483
SF00482
1996 Jan 05
3
京公网安备 11010802033920号
EEWORLD
