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MC74LCX02SDR2

Description
NOR Gate, LVC/LCX/Z Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, SSOP-14
Categorylogic    logic   
File Size135KB,7 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric View All

MC74LCX02SDR2 Overview

NOR Gate, LVC/LCX/Z Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, SSOP-14

MC74LCX02SDR2 Parametric

Parameter NameAttribute value
MakerMotorola ( NXP )
package instructionSSOP,
Reach Compliance Codeunknown
Is SamacsysN
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G14
length6.2 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNOR GATE
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
propagation delay (tpd)6 ns
Certification statusNot Qualified
Maximum seat height2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width5.3 mm
Base Number Matches1
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage CMOS Quad
2-Input NOR Gate
With 5V-Tolerant Inputs
The MC74LCX02 is a high performance, quad 2–input NOR gate
operating from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5V allows MC74LCX02 inputs to be safely driven from
5V devices.
Current drive capability is 24mA at the outputs.
MC74LCX02
LOW–VOLTAGE CMOS
QUAD 2–INPUT NOR GATE
Designed for 2.7 to 3.6V VCC Operation
5V Tolerant Inputs — Interface Capability With 5V TTL Logic
LVTTL Compatible
LVCMOS Compatible
24mA Balanced Output Sink and Source Capability
14
1
D SUFFIX
PLASTIC SOIC
CASE 751A–03
Near Zero Static Supply Current (10µA) Substantially Reduces System
Power Requirements
Latchup Performance Exceeds 500mA
ESD Performance: Human Body Model >2000V; Machine Model >200V
Pinout: 14–Lead
(Top View)
VCC
14
O2
13
B2
12
A2
11
O3
10
B3
9
A3
8
14
1
M SUFFIX
PLASTIC SOIC EIAJ
CASE 965–01
14
1
SD SUFFIX
PLASTIC SSOP
CASE 940A–03
14
1
O0
2
A0
3
B0
4
O1
5
A1
6
B1
7
GND
1
DT SUFFIX
PLASTIC TSSOP
CASE 948G–01
LOGIC DIAGRAM
A0
B0
A1
B1
A2
B2
A3
B3
2
1
3
5
4
6
11
13
12
8
10
9
O3
O2
O1
O0
PIN NAMES
Pins
An, Bn
On
Function
Data Inputs
Outputs
FUNCTION TABLE
INPUTS
An
L
L
H
H
Bn
L
H
L
H
OUTPUTS
On
H
L
L
L
11/96
©
Motorola, Inc. 1996
1
REV 1

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