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74F899QC

Description
9-Bit Latchable Transceiver with Parity Generator/Checker
Categorylogic    logic   
File Size92KB,12 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74F899QC Overview

9-Bit Latchable Transceiver with Parity Generator/Checker

74F899QC Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeLCC
package instruction0.450 X 0.450 INCH, MO-047, PLASTIC, LCC-28
Contacts28
Reach Compliance Codecompli
Other featuresWITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Control typeINDEPENDENT CONTROL
Counting directionBIDIRECTIONAL
seriesF/FAST
JESD-30 codeS-PQCC-J28
JESD-609 codee3
length11.43 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
MaximumI(ol)0.064 A
Humidity sensitivity level2
Number of digits9
Number of functions1
Number of ports2
Number of terminals28
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC28,.5SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)235
power supply5 V
Maximum supply current (ICC)210 mA
Prop。Delay @ Nom-Su14 ns
propagation delay (tpd)11 ns
Certification statusNot Qualified
Maximum seat height4.57 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
translateN/A
width11.43 mm
Base Number Matches1
74F899 9-Bit Latchable Transceiver
February 1989
Revised August 1999
74F899
9-Bit Latchable Transceiver
with Parity Generator/Checker
General Description
The 74F899 is a 9-bit to 9-bit parity transceiver with trans-
parent latches. The device can operate as a feed-through
transceiver or it can generate/check parity from the 8-bit
data busses in either direction. It has a guaranteed current
sinking capability of 24 mA at the A-bus and 64 mA at the
B-bus.
The 74F899 features independent latch enables for the
A-to-B direction and the B-to-A direction, a select pin for
ODD/EVEN parity, and separate error signal output pins for
checking parity.
Features
s
Latchable transceiver with output sink of 24 mA at the
A-bus and 64 mA at the B-bus
s
Option to select generate parity and check or
“feed-through” data/parity in directions A-to-B or B-to-A
s
Independent latch enables for A-to-B and B-to-A
directions
s
Select pin for ODD/EVEN parity
s
ERRA and ERRB output pins for parity checking
s
Ability to simultaneously generate and check parity
s
May be used in systems applications in place of the
74F543 and 74F280
s
May be used in system applications in place of the
74F657 and 74F373 (no need to change T/R to check
parity)
Ordering Code:
Order Number
74F899SC
74F899QC
Package Number
M28B
V28A
Package Description
28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignment for SOIC
Pin Assignment for PCC
Logic Symbol
© 1999 Fairchild Semiconductor Corporation
DS010195
www.fairchildsemi.com

74F899QC Related Products

74F899QC 74F899 74F899SC
Description 9-Bit Latchable Transceiver with Parity Generator/Checker 9-Bit Latchable Transceiver with Parity Generator/Checker 9-Bit Latchable Transceiver with Parity Generator/Checker
Is it Rohs certified? conform to - conform to
Maker Fairchild - Fairchild
Parts packaging code LCC - SOIC
package instruction 0.450 X 0.450 INCH, MO-047, PLASTIC, LCC-28 - SOP, SOP28,.4
Contacts 28 - 28
Reach Compliance Code compli - compli
Other features WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION - WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Control type INDEPENDENT CONTROL - INDEPENDENT CONTROL
Counting direction BIDIRECTIONAL - BIDIRECTIONAL
series F/FAST - F/FAST
JESD-30 code S-PQCC-J28 - R-PDSO-G28
JESD-609 code e3 - e3
length 11.43 mm - 17.9 mm
Load capacitance (CL) 50 pF - 50 pF
Logic integrated circuit type REGISTERED BUS TRANSCEIVER - REGISTERED BUS TRANSCEIVER
MaximumI(ol) 0.064 A - 0.064 A
Humidity sensitivity level 2 - 3
Number of digits 9 - 9
Number of functions 1 - 1
Number of ports 2 - 2
Number of terminals 28 - 28
Maximum operating temperature 70 °C - 70 °C
Output characteristics 3-STATE - 3-STATE
Output polarity TRUE - TRUE
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code QCCJ - SOP
Encapsulate equivalent code LDCC28,.5SQ - SOP28,.4
Package shape SQUARE - RECTANGULAR
Package form CHIP CARRIER - SMALL OUTLINE
Peak Reflow Temperature (Celsius) 235 - 260
power supply 5 V - 5 V
Maximum supply current (ICC) 210 mA - 210 mA
Prop。Delay @ Nom-Su 14 ns - 14 ns
propagation delay (tpd) 11 ns - 11 ns
Certification status Not Qualified - Not Qualified
Maximum seat height 4.57 mm - 2.65 mm
Maximum supply voltage (Vsup) 5.5 V - 5.5 V
Minimum supply voltage (Vsup) 4.5 V - 4.5 V
Nominal supply voltage (Vsup) 5 V - 5 V
surface mount YES - YES
technology TTL - TTL
Temperature level COMMERCIAL - COMMERCIAL
Terminal surface Matte Tin (Sn) - Matte Tin (Sn)
Terminal form J BEND - GULL WING
Terminal pitch 1.27 mm - 1.27 mm
Terminal location QUAD - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED
translate N/A - N/A
width 11.43 mm - 7.5 mm
Base Number Matches 1 - 1
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