EEWORLDEEWORLDEEWORLD

Part Number

Search

BSH299115

Description
TRANSISTOR 200 mA, 50 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal
CategoryDiscrete semiconductor    The transistor   
File Size140KB,6 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

BSH299115 Overview

TRANSISTOR 200 mA, 50 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal

BSH299115 Parametric

Parameter NameAttribute value
MakerNXP
package instructionSMALL OUTLINE, R-PDSO-G6
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresLOW THRESHOLD, LOGIC LEVEL COMPATIBLE
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage50 V
Maximum drain current (ID)0.2 A
Maximum drain-source on-resistance10 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)12 pF
JESD-30 codeR-PDSO-G6
Number of components1
Number of terminals6
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeP-CHANNEL
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
transistor applicationsSWITCHING
Transistor component materialsSILICON

BSH299115 Related Products

BSH299115 BSH299135
Description TRANSISTOR 200 mA, 50 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal TRANSISTOR 200 mA, 50 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal
Maker NXP NXP
package instruction SMALL OUTLINE, R-PDSO-G6 SMALL OUTLINE, R-PDSO-G6
Reach Compliance Code unknown unknown
ECCN code EAR99 EAR99
Other features LOW THRESHOLD, LOGIC LEVEL COMPATIBLE LOW THRESHOLD, LOGIC LEVEL COMPATIBLE
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 50 V 50 V
Maximum drain current (ID) 0.2 A 0.2 A
Maximum drain-source on-resistance 10 Ω 10 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss) 12 pF 12 pF
JESD-30 code R-PDSO-G6 R-PDSO-G6
Number of components 1 1
Number of terminals 6 6
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Polarity/channel type P-CHANNEL P-CHANNEL
Certification status Not Qualified Not Qualified
surface mount YES YES
Terminal form GULL WING GULL WING
Terminal location DUAL DUAL
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
Drive for advice
Can someone post a piece of their own code? A completed driver (with comments). My goal is to figure out where to write some code! For example: usbdeviceattach is called when the USB is connected to t...
niexs Embedded System
Application of frequency converter in starting and speed regulation system of multiple fans
在工业控制领域变频调速正越来越普遍地使用于各种调速系统中,它具有体积小、重量轻、安装操作简单、数据可靠、性能稳定、节电效果显著等优点。用在风机、水泵调速控制系统中具有软起动功能,减少了对电网的污染。而单台变频器既可用于多台风机软起动又可用于对某台风机调速,这在某些应用场合具有非常重要的现实意义。   Southern Xinjiang is rich in cotton, and many cot...
zbz0529 Industrial Control Electronics
[Novice FPGA VHDL Learning Post] Post 6 Flashing Light
[align=center][Rookie FPGA VHDL Learning Post] Post 6 [font=Times New Roman] [/font] Flashing Light [/align][align=left][font=Times New Roman][color=#000000] [/color][/font][/align][align=left][b]The ...
常见泽1 FPGA/CPLD
How to get the frame length
My method: The total length of the IP + 14 (Ethernet header length) = the length of the entire frame. However, most packets captured by IRIS can be calculated using my method, but sometimes it is not ...
xuchenjian Embedded System
What does this program mean about cc2530?
Macro definition for setting T3 overflow interrupt register **********************************************/ #define TIMER34_ENABLE_OVERFLOW_INT(timer,val) \ (T3CTL = (val) ? T3CTL | 0x08 : T3CTL & ~0x...
mr.jiang RF/Wirelessly
Verilog HDL---Blocking and Non-Blocking Assignments
General usage of blocking and non-blocking assignments:1 ) Using blocking assignment in the always block that describes the combinational logic will synthesize into a combinational logic circuit struc...
捍卫真理 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1725  678  2223  1549  254  35  14  45  32  6 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号