DISCRETE SEMICONDUCTORS
DATA SHEET
BTA204W series D, E and F
Three quadrant triacs
guaranteed commutation
Product
specification
December 1998
NXP Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
GENERAL DESCRIPTION
Passivated guaranteed commutation
triacs in a plastic envelope suitable for
surface mounting, intended for use in
motor control circuits or with other
highly inductive loads. These devices
balance
the
requirements
of
commutation performance and gate
sensitivity. The "sensitive gate" E
series and "logic level" D series are
intended for interfacing with low power
drivers, including micro controllers.
BTA204W series D, E and F
QUICK REFERENCE DATA
SYMBOL
PARAMETER
BTA204W-
BTA204W-
BTA204W-
MAX. MAX.
500D
500E
500F
500
1
10
600D
600E
600F
600
1
10
MAX. UNIT
-
800E
800F
800
1
10
V
DRM
I
T(RMS)
I
TSM
Repetitive peak
off-state voltages
RMS on-state current
Non-repetitive peak on-state
current
V
A
A
PINNING - SOT223
PIN
1
2
3
tab
DESCRIPTION
main terminal 1
main terminal 2
gate
main terminal 2
PIN CONFIGURATION
4
SYMBOL
T2
T1
1
2
3
G
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
V
DRM
I
T(RMS)
I
TSM
PARAMETER
Repetitive peak off-state
voltages
RMS on-state current
Non-repetitive peak
on-state current
full sine wave;
T
sp
≤
108 ˚C
full sine wave;
T
j
= 25 ˚C prior to
surge
t = 20 ms
t = 16.7 ms
t = 10 ms
I
TM
= 1.5 A;
I
G
= 0.2 A;
dI
G
/dt = 0.2 A/µs
CONDITIONS
MIN.
-
-
-500
500
1
MAX.
-600
600
1
1
-800
800
UNIT
V
A
I
2
t
dI
T
/dt
I
GM
V
GM
P
GM
P
G(AV)
T
stg
T
j
I
2
t for fusing
Repetitive rate of rise of
on-state current after
triggering
Peak gate current
Peak gate voltage
Peak gate power
Average gate power
Storage temperature
Operating junction
temperature
-
-
-
10
11
0.5
100
2
5
5
0.5
150
125
A
A
A
2
s
A/µs
A
V
W
W
˚C
˚C
over any 20 ms
period
-
-
-
-
-40
-
1
Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may
switch to the on-state. The rate of rise of current should not exceed 6 A/µs.
December 1998
2
Rev 1.000
NXP
Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
THERMAL RESISTANCES
SYMBOL
R
th j-sp
R
th j-a
PARAMETER
Thermal resistance
junction to solder point
Thermal resistance
junction to ambient
CONDITIONS
full or half cycle
BTA204W series D, E and F
MIN.
-
-
-
TYP.
-
156
70
MAX.
15
-
-
UNIT
K/W
K/W
K/W
pcb mounted; minimum footprint
pcb mounted; pad area as in fig:2
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
I
GT
PARAMETER
Gate trigger current
2
CONDITIONS
BTA204W-
V
D
= 12 V; I
T
= 0.1 A
T2+ G+
T2+ G-
T2- G-
V
D
= 12 V; I
GT
= 0.1 A
T2+ G+
T2+ G-
T2- G-
V
D
= 12 V; I
GT
= 0.1 A
I
T
= 2 A
V
D
= 12 V; I
T
= 0.1 A
V
D
= 400 V; I
T
= 0.1 A;
T
j
= 125 ˚C
V
D
= V
DRM(max)
;
T
j
= 125 ˚C
-
-
-
-
-
-
-
-
-
0.25
-
-
-
-
-
-
-
-
1.2
0.7
0.4
0.1
MIN.
TYP.
...D
5
5
5
6
9
6
6
MAX.
...E
10
10
10
12
18
12
12
1.5
1.5
-
0.5
...F
25
25
25
20
30
20
20
mA
mA
mA
mA
mA
mA
mA
V
V
V
mA
UNIT
I
L
Latching current
I
H
V
T
V
GT
I
D
Holding current
On-state voltage
Gate trigger voltage
Off-state leakage current
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
dV
D
/dt
PARAMETER
Critical rate of rise of
off-state voltage
Critical rate of change of
commutating current
Critical rate of change of
commutating current
Gate controlled turn-on
time
CONDITIONS
BTA204W-
...D
V
DM
= 67% V
DRM(max)
;
20
T
j
= 125 ˚C; exponential
waveform; gate open
circuit
V
DM
= 400 V; T
j
= 125 ˚C; 1.0
I
T(RMS)
= 1 A;
dV
com
/dt = 20V/µs; gate
open circuit
V
DM
= 400 V; T
j
= 125 ˚C; 5.0
I
T(RMS)
= 1 A;
dV
com
/dt = 0.1V/µs; gate
open circuit
I
TM
= 12 A; V
D
= V
DRM(max)
;
-
I
G
= 0.1 A; dI
G
/dt = 5 A/µs
MIN.
...E
30
...F
50
-
-
V/µs
TYP.
MAX.
UNIT
dI
com
/dt
2.0
2.5
-
-
A/ms
dI
com
/dt
-
-
-
-
A/ms
t
gt
-
-
2
-
µs
2
Device does not trigger in the T2-, G+ quadrant.
December 1998
3
Rev 1.000
NXP
Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
Ptot / W
BT134W
Tsp(max) / C
BTA204W series D, E and F
1.4
1.2
104
107
1.2
1
0.8
0.6
IT(RMS) / A
BT134W
108 C
= 180
1
0.8
0.6
0.4
0.2
0
0
0.2
0.4
0.6
0.8
IT(RMS) / A
1
1
120
90
60
30
110
113
116
119
122
125
1.2
0.4
0.2
0
-50
0
50
Tsp / C
100
150
Fig.1. Maximum on-state dissipation, P
tot
, versus rms
on-state current, I
T(RMS)
, where
α
= conduction angle.
ITSM / A
BT134W
IT
T
100
dI
T
/dt limit
I TSM
time
Fig.4. Maximum permissible rms current I
T(RMS)
,
versus solder point temperature T
sp
.
IT(RMS) / A
BT134W
1000
2
1.5
Tj initial = 25 C max
1
T2- G+ quadrant
10
0.5
1
10us
100us
1ms
T/s
10ms
100ms
0
0.01
0.1
surge duration / s
1
10
Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
≤
20ms.
ITSM / A
BT134W
IT
T
8
6
4
2
0
ITSM
time
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
sp
≤
108˚C.
VGT(Tj)
VGT(25 C)
12
10
1.6
1.4
1.2
1
0.8
0.6
BT136
Tj initial = 25 C max
1
10
100
Number of cycles at 50Hz
1000
0.4
-50
0
50
Tj / C
100
150
Fig.3. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25˚C), versus junction temperature T
j
.
December 1998
4
Rev 1.000
NXP
Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
IGT(Tj)
IGT(25 C)
IT / A
BTA204W series D, E and F
3
2.5
2
1.5
1
BTA204
2
BT134W
T2+ G+
T2+ G-
T2- G-
Tj = 125 C
Tj = 25 C
1.5
Vo = 1.0 V
Rs = 0.21 Ohms
typ
max
1
0.5
0.5
0
-50
0
50
Tj / C
100
150
0
0
0.5
1
VT / V
1.5
2
Fig.7. Normalised gate trigger current
I
GT
(T
j
)/ I
GT
(25˚C), versus junction temperature T
j
.
IL(Tj)
IL(25 C)
Fig.10. Typical and maximum on-state characteristic.
3
2.5
2
1.5
1
0.5
TRIAC
100
Zth j-sp (K/W)
BT134W
10
unidirectional
1
bidirectional
P
D
t
p
0.1
t
0
-50
0
50
Tj / C
100
150
0.01
10us
0.1ms
1ms
10ms
tp / s
0.1s
1s
10s
Fig.8. Normalised latching current I
L
(T
j
)/ I
L
(25˚C),
versus junction temperature T
j
.
IH(Tj)
IH(25C)
Fig.11. Transient thermal impedance Z
th j-sp
, versus
pulse width t
p
.
3
2.5
2
1.5
1
0.5
TRIAC
0
-50
0
50
Tj / C
100
150
Fig.9. Normalised holding current I
H
(T
j
)/ I
H
(25˚C),
versus junction temperature T
j
.
December 1998
5
Rev 1.000
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