BUK9C07-65BIT
N-channel TrenchPLUS logic level FET
Rev. 03 — 15 July 2010
Product data sheet
1. Product profile
1.1 General description
N-channel enhancement mode field-effect power transistor in SOT427. Device is
manufactured using NXP High-Performance TrenchPLUS technology, featuring very low
on-state resistance, integrated current sensing transistor and over temperature protection
diodes.
1.2 Features and benefits
AEC-Q101 compliant
Low conduction losses due to low
on-state resistance
1.3 Applications
Lamp switching
Motor drive systems
Power distribution
Solenoid drivers
1.4 Quick reference data
Table 1.
Symbol
R
DSon
Quick reference data
Parameter
drain-source
on-state
resistance
ratio of drain
current to sense
current
drain-source
breakdown
voltage
Conditions
V
GS
= 5 V; I
D
= 25 A;
T
j
= 25 °C; see
Figure 12;
see
Figure 13
T
j
= 25 °C; V
GS
= 5 V;
see
Figure 14
I
D
= 250 µA; V
GS
= 0 V;
T
j
= 25 °C
Min
-
Typ
6
Max Unit
7
mΩ
Static characteristics
I
D
/I
sense
1086 1206 1327 A/A
1
8
5
65
-
-
V
V
(BR)DSS
NXP Semiconductors
BUK9C07-65BIT
N-channel TrenchPLUS logic level FET
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
mb
Pinning information
Symbol Description
G
IS
A
D
K
KS
S
D
gate
current sense
anode
drain
cathode
Kelvin source
source
mb
4
123 567
G
IS
S
KS
C
003aad829
Simplified outline
mb
Graphic symbol
D
A
SOT427 (D2PAK)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9C07-65BIT
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 7 leads SOT427
(one lead cropped)
Type number
BUK9C07-65BIT
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 15 July 2010
2 of 16
NXP Semiconductors
BUK9C07-65BIT
N-channel TrenchPLUS logic level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
V
isol(FET-TSD)
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
FET to temperature sense
diode isolation voltage
source current
peak source current
non-repetitive drain-source
avalanche energy
electrostatic discharge voltage
T
mb
= 25 °C
single pulse; t
p
≤
10 µs; T
mb
= 25 °C
I
D
= 75 A; V
sup
= 65 V; V
GS
= 5 V;
T
j(init)
= 25 °C; unclamped; see
Figure 3
HBM; C = 100 pF; R = 1.5 kΩ; all pins
HBM; C = 100 pF; R = 1.5 kΩ; pin 4 to
pin 7
[1]
[2]
[3]
Current is limited by package.
Single-pulse avalanche rating limited by maximum junction temperature of 150 °C.
Refer to application note AN10273 for further information.
[2][3]
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
25 °C
≤
T
j
≤
150 °C
R
GS
= 20 kΩ; 25 °C
≤
T
j
≤
150 °C
V
GS
= 5 V; T
mb
= 25 °C; see
Figure 1
V
GS
= 5 V; T
mb
= 100 °C; see
Figure 1
T
mb
= 25 °C; single pulse; t
p
≤
10 µs;
see
Figure 4
T
mb
= 25 °C; see
Figure 2
[1]
[1]
Min
-
-
-15
-
-
-
-
-55
-55
-
Max
65
65
15
75
75
550
245
150
150
100
Unit
V
V
V
A
A
A
W
°C
°C
V
Source-drain diode
I
S
I
SM
E
DS(AL)S
-
-
-
75
550
0.605
A
A
J
Avalanche ruggedness
Electrostatic discharge
V
ESD
-
-
0.15
4
kV
kV
BUK9C07-65BIT
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 15 July 2010
3 of 16
NXP Semiconductors
BUK9C07-65BIT
N-channel TrenchPLUS logic level FET
160
I
D
(A)
120
001aal548
120
P
der
(%)
80
003aab388
80
(1)
40
40
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
200
T
sp
(°C)
Fig 1.
Continuous drain current as a function of
solder point temperature.
10
2
I
AL
(A)
10
Fig 2.
Normalized total power dissipation as a
function of solder point temperature
001aal677
(1)
(2)
(3)
1
10
−1
10
−3
10
−2
10
−1
1
t
AL
(ms)
10
Fig 3.
Single-Pulse and repetitive avalanche rating; avalanche current as a function of avalanche time.
BUK9C07-65BIT
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 15 July 2010
4 of 16
NXP Semiconductors
BUK9C07-65BIT
N-channel TrenchPLUS logic level FET
10
3
I
D
(A)
10
2
Limit R
DSon
= V
DS
/ I
D
001aal753
t
p
= 10
μs
100
μs
10
DC
1
1 ms
10 ms
10
−1
100 ms
10
−2
1
10
V
DS
(V)
10
2
Fig 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9C07-65BIT
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 15 July 2010
5 of 16
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