ASM5I2308A-3-16-TT datasheet, PDF

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ASM5I2308A-3-16-TT: DescriptionPLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16; Categorylogic logic; File Size626KB，14 Pages; ManufacturerALSC [Alliance Semiconductor Corporation]

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ASM5I2308A-3-16-TT Overview

PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16

ASM5I2308A-3-16-TT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ALSC [Alliance Semiconductor Corporation]
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP16,.25
Contacts	16
Reach Compliance Code	unknown
Is Samacsys	N
series	2308
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G16
JESD-609 code	e0
length	5 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.008 A
Number of functions	1
Number of inverted outputs
Number of terminals	16
Actual output times	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.4 ns
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm
minfmax	133 MHz
Base Number Matches	1

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November 2003

rev 1.1

3.3V Zero-Delay Buffer

General Features

•

Zero input - output propagation delay, adjustable by

capacitive load on FBK input.

•

Zero input - output propagation delay, adjustable by

capacitive load on FBK input.

•

Multiple configurations - Refer “ASM5P2308A

Configurations Table”.

•

Input frequency range: 10MHz to 133MHz

Multiple low-skew outputs.

•

Output-output skew less than 200 ps.

Device-device skew less than 700 ps.

Two banks of four outputs, three-stateable by two

The

ASM5P2308A

available

ASM5P2308A

which can be controlled by the select inputs as shown in

the Select Input Decoding Table. If all the output clocks are

not required, Bank B can be three-stated. The select input

also allows the input clock to be directly applied to the

outputs for chip and system testing purposes.

Multiple ASM5P2308A devices can accept the same input

clock and distribute it. In this case the skew between the

outputs of the two devices is guaranteed to be less than

700ps.

five

different

configurations (Refer “ASM5P2308A Configurations Table).

The ASM5P2308A-1 is the base part, where the output

frequencies equal the reference if there is no counter in the

feedback path. The ASM5P2308A-1H is the high-drive

version of the -1 and the rise and fall times on this device

are much faster.

select inputs.

•

Less than 200 ps cycle-to-cycle jitter (-1, -1H, -4, -5H).

Available in 16-pin SOIC and TSSOP packages.

3.3V operation.

Advanced 0.35µ CMOS technology.

Industrial temperature available.

Functional Description

ASM5P2308A is a versatile, 3.3V zero-delay buffer

designed to distribute high-speed clocks. It is available in a

16-pin package. The part has an on-chip PLL which locks

to an input clock presented on the REF pin. The PLL

feedback is required to be driven to FBK pin, and can be

obtained from one of the outputs. The input-to-input

propagation delay is guaranteed to be less than 350ps, and

the output-to-output skew is guaranteed to be less than

250ps.

The ASM5P2308A-2 allows the user to obtain 2X and 1X

frequencies on each output bank. The exact configuration

and output frequencies depends on which output drives the

feedback pin. The ASM5P2308A-3 allows the user to

obtain 4X and 2X frequencies on the outputs.

The ASM5P2308A-4 enables the user to obtain 2X clocks

on all outputs. Thus, the part is extremely versatile, and

can be used in a variety of applications.

The ASM5P2308A-5H is a high-drive version with REF/2

on both banks.

The ASM5P2308A has two banks of four outputs each,

3.3V Zero Delay Buffer

Notice: The information in this document is subject to change without notice.

ASM5I2308A-3-16-TT Related Products

	ASM5I2308A-3-16-TT	ASM5I2308A-1-16-TT	ASM5I2308A-1H-16-ST	ASM5I2308A-1H-16-TT	ASM5I2308A-5H-16-ST	ASM5I2308A-4-16-TR
Description	PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16	PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16	PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 0.150 INCH, SOIC-16	PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16	PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 0.150 INCH, SOIC-16	PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	TSSOP	TSSOP	SOIC	TSSOP	SOIC	TSSOP
package instruction	TSSOP, TSSOP16,.25	TSSOP, TSSOP16,.25	SOP, SOP16,.25	TSSOP, TSSOP16,.25	SOP, SOP16,.25	TSSOP, TSSOP16,.25
Contacts	16	16	16	16	16	16
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
series	2308	2308	2308	2308	2308	2308
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609 code	e0	e0	e0	e0	e0	e0
length	5 mm	5 mm	9.905 mm	5 mm	9.905 mm	5 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.008 A	0.008 A	0.012 A	0.012 A	0.012 A	0.008 A
Number of functions	1	1	1	1	1	1
Number of terminals	16	16	16	16	16	16
Actual output times	8	8	8	8	8	8
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	SOP	TSSOP	SOP	TSSOP
Encapsulate equivalent code	TSSOP16,.25	TSSOP16,.25	SOP16,.25	TSSOP16,.25	SOP16,.25	TSSOP16,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.4 ns	0.2 ns	0.2 ns	0.2 ns	0.2 ns	0.2 ns
Maximum seat height	1.2 mm	1.2 mm	1.75 mm	1.2 mm	1.75 mm	1.2 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	1.27 mm	0.65 mm	1.27 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	4.4 mm	4.4 mm	3.9 mm	4.4 mm	3.9 mm	4.4 mm
minfmax	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz
Base Number Matches	1	1	1	1	1	1
Maker	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	-
Is Samacsys	N	N	N	N	N	-

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