74HC283
4-bit binary full adder with fast carry
Rev. 03 — 11 November 2004
Product data sheet
1. General description
The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC283 is specified in compliance with JEDEC
standard no. 7A.
The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).
The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT)
according to the equation:
CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) =
= S1 + 2S2 + 4S3 + 8S4 + 16COUT
Where (+) = plus.
Due to the symmetry of the binary add function, the 74HC283 can be used with either all
active HIGH operands (positive logic) or all active LOW operands (negative logic). In case
of all active LOW operands the results S1 to S4 and COUT should be interpreted also as
active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is
intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1,
B1 can be assigned arbitrarily to pins 5, 6, 7, etc.
See the 74HC583 for the BCD version.
2. Features
s
s
s
s
s
s
High-speed 4-bit binary addition
Cascadable in 4-bit increments
Fast internal look-ahead carry
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V.
s
Multiple package options
s
Specified from
−40 °C
to +80
°C
and from
−40 °C
to +125
°C.
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns.
Symbol
t
PHL
, t
PLH
Parameter
propagation delay
CIN to S1
CIN to S2
CIN to S3
CIN to S4
An or Bn to Sn
CIN to COUT
An or Bn to COUT
C
I
C
PD
[1]
Conditions
C
L
= 15 pF; V
CC
= 5 V
Min
-
-
-
-
-
-
-
-
Typ
16
18
20
23
21
20
20
3.5
88
Max
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
pF
pF
input capacitance
power dissipation
capacitance
V
I
= GND to V
CC
[1]
-
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
∑(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
∑(C
L
×
V
CC2
×
f
o
) = sum of outputs.
4. Ordering information
Table 2:
Ordering information
Package
Temperature range
74HC283N
74HC283D
74HC283DB
74HC283PW
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
DIP16
SO16
SSOP16
TSSOP16
Description
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package;
16 leads; body width 4.4 mm
Version
SOT38-4
SOT109-1
SOT338-1
SOT403-1
Type number
9397 750 13811
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
2 of 20
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
5. Functional diagram
9
COUT
9
11 B4
COUT
12 A4
15 B3
14 A3
2 B2
3 A2
6 B1
5 A1
S4 10
S3 13
S2 1
S1 4
11
12
15
14
2
3
6
5
B4
A4
B3
A3
B2
A2
B1
A1
CIN
7
S4
S3
S2
S1
10
13
1
4
CIN
7
001aab897
001aab895
Fig 1. Functional diagram
Fig 2. Logic symbol
5
3
14
12
6
12
15
11
7
0
P
0
3
S
0
3
Q
3
CIN
COUT
001aab896
4
1
13
10
9
Fig 3. IEC logic symbol
9397 750 13811
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
3 of 20
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
6.2 Pin description
Table 3:
Symbol
S2
B2
A2
S1
A1
B1
CIN
GND
COUT
S4
B4
A4
S3
B3
A3
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
sum output 2
B operand input 2
A operand input 2
sum output 1
A operand input 1
B operand input 1
carry input
ground (0 V)
carry output
sum output 4
B operand input 4
A operand input 4
sum output 3
A operand input 3
B operand input 3
positive supply voltage
7. Functional description
7.1 Function table
Table 4:
Pins
Logic levels
Active HIGH
[2]
Active LOW
[3]
[1]
[2]
[3]
Function table
[1]
Input
CIN
L
0
1
A4
H
1
0
A3
L
0
1
A2
H
1
0
A1
L
0
1
B4
H
1
0
B3
L
0
1
B2
L
0
1
B1
H
1
0
Output
COUT
H
1
0
S4
L
0
1
S3
L
0
1
S2
H
1
0
S1
H
1
0
H = HIGH voltage level;
L = LOW voltage level.
Example for active HIGH: 10 + 9 (0 + 1010 + 1001) = 19 (10011).
Example for active LOW: 5 + 6 (1 + 0101 + 0110) = 12 (01100).
9397 750 13811
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
5 of 20
京公网安备 11010802033920号
EEWORLD
