Burr Brown Products
from Texas Instruments
ADS7884
ADS7885
SLAS567 – MARCH 2008
10-/8-BIT, 3-MSPS, MICRO-POWER, MINIATURE
SAR ANALOG-TO-DIGITAL CONVERTERS
1
FEATURES
3-MHz Sample Rate Serial Device
10-Bit Resolution – ADS7884
8-Bit Resolution – ADS7885
Zero Latency
48-MHz Serial Interface
Supply Range: 2.7 V to 5.5 V
Low Power Dissipation:
– 6.8 mW at 3-V V
DD
, 2.5 MSPS
– 15 mw at 5-V V
DD
, 3 MSPS
±0.3 LSB INL, ±0.3 LSB DNL – ADS7884
±0.15 LSB INL, ±0.1 LSB DNL – ADS7885
61.7 dB SINAD, –81 dB THD – ADS7884
49.8 dB SINAD, –68 dB THD – ADS7885
Unipolar Input Range: 0 V to V
DD
Powerdown Current: 1 µA
Wide Input Bandwidth: 30 MHz at 3 dB
6-Pin SOT23 Package
APPLICATIONS
•
•
•
•
•
•
•
•
Base Band Converters in Radio
Communication
Motor Current/Bus Voltage Sensors in Digital
Drives
Optical Networking (DWDM, MEMS Based
Switching)
Optical Sensors
Battery Powered Systems
Medical Instrumentations
High-Speed Data Acquisition Systems
High-Speed Closed-Loop Systems
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
DESCRIPTION
The ADS7884 is a 10-bit, 3-MSPS analog-to-digital converter (ADC), and the ADS7885 is a 8-bit, 3-MSPS ADC.
The devices include a capacitor based SAR A/D converter with inherent sample and hold. The serial interface in
each device is controlled by the CS and SCLK signals for glueless connections with microprocessors and DSPs.
The input signal is sampled with the falling edge of CS, and SCLK is used for conversion and serial data output.
The devices operate from a wide supply range from 2.7 V to 5.5 V. The low power consumption of the devices
make them suitable for battery-powered applications. The devices also include a power saving powerdown
feature for when the devices are operated at lower conversion speeds.
The high level of the digital input to the device is not limited to device V
DD
. This means the digital input can go as
high as 5.5 V when device supply is 2.7 V. This feature is useful when digital signals are coming from other
circuit with different supply levels. Also this relaxes restriction on power up sequencing.
The ADS7884 and ADS7885 are available in a 6-pin SOT23 package and are specified for operation from –40°C
to 125°C.
Micro-Power Miniature SAR Converter Family
BIT
12-Bit
10-Bit
8-Bit
< 300 KSPS
ADS7866 (1.2 V
DD
to 3.6 V
DD
)
ADS7867 (1.2 V
DD
to 3.6 V
DD
)
ADS7868 (1.2 V
DD
to 3.6 V
DD
)
300 KSPS – 1.25 MSPS
ADS7886 (2.35 V
DD
to 5.25 V
DD
)
ADS7887 (2.35 V
DD
to 5.25 V
DD
)
ADS7888 (2.35 V
DD
to 5.25 V
DD
)
—
ADS7884 (2.7 V
DD
to 5.5 V
DD
)
ADS7885 (2.7 V
DD
to 5.5 V
DD
)
3 MSPS
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
ADS7884
ADS7885
SLAS567 – MARCH 2008
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
SAR
+IN
CDAC
COMPARATOR
VDD
OUTPUT
LATCHES
&
3−STATE
DRIVERS
SDO
ADS7884/ADS7885
CONVERSION
&
CONTROL
LOGIC
SCLK
CS
PACKAGE/ORDERING INFORMATION
(1)
DEVICE
MAXIMUM
INTEGRAL
LINEARITY
(LSB)
MAXIMUM
DIFFERENTIAL
LINEARITY
(LSB)
NO MISSING
CODES AT
RESOLUTION
(BIT)
PACKAGE
TYPE
PACKAGE
DESIGNAT
OR
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
INFORMATION
TRANSPORT
MEDIA
QUANTITY
Tape and
reel 250
Tape and
reel 3000
Tape and
reel 250
Tape and
reel 3000
7884
ADS7884
±0.8
±0.8
10
6-Pin
SOT23
DBV
–40°C to 125°C
7884
7885
ADS7885
±0.4
±0.4
8
6-Pin
SOT23
DBV
–40°C to 125°C
7885
ADS7884SDBVT
ADS7884SDBVR
ADS7885SDBVT
ADS7885SDBVR
(1)
For most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
UNIT
+IN to AGND
+V
DD
to AGND
Digital input voltage to GND
Digital output to GND
Operating temperature range
Storage temperature range
Junction temperature (T
J
Max)
Power dissipation, SOT23 package
Thermal impedance,
θ
JA
Lead temperature, soldering
(1)
SOT23
Vapor phase (60 sec)
Infrared (15 sec)
–0.3 V to +V
DD
+0.3 V
–0.3 V to 7.0 V
–0.3V to (7.0 V)
–0.3 V to (+V
DD
+ 0.3 V)
–40°C to 125°C
–65°C to 150°C
150°C
(T
J
Max–T
A
)/θ
JA
295.2°C/W
215°C
220°C
Stresses above those listed under
absolute maximum ratings
may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
2
Submit Documentation Feedback
Product Folder Link(s):
ADS7884 ADS7885
Copyright © 2008, Texas Instruments Incorporated
www.ti.com
ADS7884
ADS7885
SLAS567 – MARCH 2008
ADS7884 SPECIFICATIONS
+V
DD
= 2.7 V to 5.5 V, T
A
= –40°C to 125°C, f
sample
= 2.5 MSPS for V
DD
= 2.7 V to 3.6 V, f
sample
= 3 MSPS for V
DD
= 3.6 V to
5.5 V
PARAMETER
ANALOG INPUT
Full-scale input voltage span
(1)
Absolute input voltage range
C
i
I
Ilkg
Input capacitance
(2)
TEST CONDITIONS
MIN
0
TYP
MAX
V
DD
V
DD
+0.20
UNIT
V
V
pF
nA
Bits
Bits
+IN
T
A
= 125°C
–0.20
27
40
10
10
–0.8
–0.8
–1
–1
±0.3
±0.3
±0.2
±0.2
240
93.3
Input leakage current
Resolution
No missing codes
SYSTEM PERFORMANCE
INL
DNL
E
O
E
G
Integral nonlinearity
Differential nonlinearity
Offset error
(4) (5) (6)
0.8
0.8
1
1
LSB
(3)
LSB
LSB
LSB
ns
ns
Gain error
(5)
Conversion time
Acquisition time
Maximum throughput rate
Aperture delay
48-MHz SCLK, V
DD
= 5 V
48-MHz SCLK, V
DD
= 5 V
SAMPLING DYNAMICS
224
3
10
MHz
ns
dB
dB
dB
MHz
DYNAMIC CHARACTERISTICS
THD
SINAD
SFDR
Total harmonic distortion
(7)
Signal-to-noise and distortion
Spurious free dynamic range
Full power bandwidth
DIGITAL INPUT/OUTPUT
Logic family — CMOS
V
IH
V
IL
V
OH
V
OL
+V
DD
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Supply voltage
At V
DD
= 3.0 V, 2.5-MSPS throughput
Supply current (normal mode)
At V
DD
= 3.0 V, static state
At V
DD
= 5.0 V, 3-MSPS throughput
At V
DD
= 5.0 V, static state
Power down state supply current
Power dissipation
SCLK off
SCLK on (48 MHz)
V
DD
= 5 V, 3 MSPS
V
DD
= 3 V, 2.5 MSPS
90
15
6.8
V
DD
= 2.7 V to 3.6 V
V
DD
= 3.6 V to 5.5 V
V
DD
= 5 V
V
DD
= 3 V
At I
source
= 200 µA
At I
sink
= 200 µA
2.7
3.3
2.25
1.8
3
2
1
200
20
µA
mW
4
V
DD
–0.2
0.4
5.5
3
mA
1.5
2.2
5.5
5.5
0.8
0.4
V
V
V
100 kHz
100 kHz
100 kHz
At –3 dB
30
60
–81
61.7
81
POWER SUPPLY REQUIREMENTS
V
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Ideal input span; does not include gain or offset error.
Refer to
Figure 43
for details on sampling circuit
LSB means least significant bit
Measured relative to an ideal full-scale input
Offset error and gain error ensured by characterization.
First transition of 000H to 001H at (V
ref
/2
10
)
Calculated on the first nine harmonics of the input frequency
Submit Documentation Feedback
Product Folder Link(s):
ADS7884 ADS7885
3
Copyright © 2008, Texas Instruments Incorporated
ADS7884
ADS7885
SLAS567 – MARCH 2008
www.ti.com
ADS7884 SPECIFICATIONS (continued)
+V
DD
= 2.7 V to 5.5 V, T
A
= –40°C to 125°C, f
sample
= 2.5 MSPS for V
DD
= 2.7 V to 3.6 V, f
sample
= 3 MSPS for V
DD
= 3.6 V to
5.5 V
PARAMETER
Power dissipation in static state
Powerdown time
Powerup time
TEMPERATURE RANGE
Specified performance
–40
125
°C
V
DD
= 5 V
V
DD
= 3 V
TEST CONDITIONS
MIN
TYP
10
5.4
0.1
0.8
MAX
UNIT
mW
µs
µs
4
Submit Documentation Feedback
Product Folder Link(s):
ADS7884 ADS7885
Copyright © 2008, Texas Instruments Incorporated
www.ti.com
ADS7884
ADS7885
SLAS567 – MARCH 2008
ADS7885 SPECIFICATIONS
+V
DD
= 2.7 V to 5.5 V, T
A
= –40°C to 125°C, f
sample
= 2.5 MSPS for V
DD
= 2.7 V to 3.6 V, f
sample
= 3 MSPS for V
DD
= 3.6 V to
5.5 V
PARAMETER
ANALOG INPUT
Full-scale input voltage span
(1)
Absolute input voltage range
C
i
I
Ilkg
Input capacitance
(2)
TEST CONDITIONS
MIN
0
TYP
MAX
V
DD
V
DD
+0.20
UNIT
V
V
pF
nA
Bits
Bits
+IN
T
A
= 125°C
–0.20
27
40
8
8
–0.4
–0.4
–0.4
–0.5
±0.15
±0.1
±0.1
±0.1
198
135
Input leakage current
Resolution
No missing codes
SYSTEM PERFORMANCE
INL
DNL
E
O
E
G
Integral nonlinearity
Differential nonlinearity
Offset error
(4) (5) (6)
0.4
0.4
0.4
0.5
LSB
(3)
LSB
LSB
LSB
ns
ns
Gain error
(5)
Conversion time
Acquisition time
Maximum throughput rate
Aperture delay
48-MHz SCLK, V
DD
= 5 V
3 MSPS mode
48-MHz SCLK, V
DD
= 5 V
SAMPLING DYNAMICS
182
3
10
MHz
ns
dB
dB
dB
MHz
DYNAMIC CHARACTERISTICS
THD
SINAD
SFDR
Total harmonic distortion
(7)
Signal-to-noise and distortion
Spurious free dynamic range
Full power bandwidth
DIGITAL INPUT/OUTPUT
Logic family — CMOS
V
IH
V
IL
V
OH
V
OL
+V
DD
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Supply voltage
At V
DD
= 3.0 V, 2.5-MSPS throughput
Supply current (normal mode)
At V
DD
= 3.0 V, static state
At V
DD
= 5.0 V, 3-MSPS throughput
At V
DD
= 5.0 V, static state
Power down state supply current
Power dissipation
SCLK off
SCLK on (48 MHz)
V
DD
= 5 V, 3 MSPS
V
DD
= 3 V, 2.5 MSPS
90
15
6.8
V
DD
= 2.7 V to 3.6 V
V
DD
= 3.6 V to 5.5 V
V
DD
= 5 V
V
DD
= 3 V
At I
source
= 200 µA
At I
sink
= 200 µA
2.7
3.3
2.25
1.8
3
2
1
200
20
µA
mW
4
V
DD
–0.2
0.4
5.5
3
mA
1.5
2.2
5.5
5.5
0.8
0.4
V
V
V
100 kHz
100 kHz
100 kHz
At –3 dB
30
49
–68
49.8
74
POWER SUPPLY REQUIREMENTS
V
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Ideal input span; does not include gain or offset error.
Refer to
Figure 43
for details on sampling circuit
LSB means least significant bit
Measured relative to an ideal full-scale input
Offset error and gain error ensured by characterization.
First transition of 000H to 001H at (V
ref
/2
8
)
Calculated on the first nine harmonics of the input frequency
Submit Documentation Feedback
Product Folder Link(s):
ADS7884 ADS7885
5
Copyright © 2008, Texas Instruments Incorporated
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