74HC7266 datasheet, PDF - EEWORLD Datasheet

74HC7266: DescriptionQuad 2-input EXCLUSIVE-NOR gate; File Size27KB，4 Pages; ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.); Websitehttps://www.nxp.com/

Download Datasheet Compare View All

74HC7266 Overview

Quad 2-input EXCLUSIVE-NOR gate

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

•

The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•

The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•

The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC7266

Quad 2-input EXCLUSIVE-NOR

gate

Product speciﬁcation

File under Integrated Circuits, IC06

December 1990

	74HC7266	74HC7266D	74HC7266N
Description	Quad 2-input EXCLUSIVE-NOR gate	Quad 2-input EXCLUSIVE-NOR gate	Quad 2-input EXCLUSIVE-NOR gate
Is it Rohs certified?	-	conform to	conform to
Maker	-	Philips Semiconductors (NXP Semiconductors N.V.)	Philips Semiconductors (NXP Semiconductors N.V.)
package instruction	-	SOP, SOP14,.25	DIP, DIP14,.3
Reach Compliance Code	-	unknow	unknow
JESD-30 code	-	R-PDSO-G14	R-PDIP-T14
JESD-609 code	-	e4	e4
Load capacitance (CL)	-	50 pF	50 pF
Logic integrated circuit type	-	XNOR GATE	XNOR GATE
MaximumI(ol)	-	0.004 A	0.004 A
Number of terminals	-	14	14
Maximum operating temperature	-	85 °C	85 °C
Minimum operating temperature	-	-40 °C	-40 °C
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	SOP	DIP
Encapsulate equivalent code	-	SOP14,.25	DIP14,.3
Package shape	-	RECTANGULAR	RECTANGULAR
Package form	-	SMALL OUTLINE	IN-LINE
power supply	-	2/6 V	2/6 V
Prop。Delay @ Nom-Su	-	35 ns	35 ns
Certification status	-	Not Qualified	Not Qualified
Schmitt trigger	-	NO	NO
surface mount	-	YES	NO
technology	-	CMOS	CMOS
Temperature level	-	INDUSTRIAL	INDUSTRIAL
Terminal surface	-	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	-	GULL WING	THROUGH-HOLE
Terminal pitch	-	1.27 mm	2.54 mm
Terminal location	-	DUAL	DUAL

C source code for simulating I2C bus using parallel port on PC: C source code for simulating I2C bus using parallel port on PC...; 破茧佼龙 MCU

EEWORLD Online Q&A Question Collection Post: Starting today, all sections of EEWORLD are collecting questions from netizens related to electronic engineering. You can post questions about any problems you encounter at work, and we will have enth...; eric_wang Integrated technical exchanges

stm32 seminar materials: Solutions to voltage detection, timer usage, etc....; daicheng stm32/stm8

Electronics Contest C Question Information: [i=s] This post was last edited by paulhyde on 2014-9-15 09:21 [/i] Some information about Dian Sai C, there may be some duplication. But it will be of some use. [[i] This post was last edited by kool...; koolah Electronics Design Contest

How to implement SPWM algorithm?: Can I ask for a routine to refer to? I really have no idea....; szc5b FPGA/CPLD

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components