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74HCT107D

Description
Dual JK flip-flop with reset; negative-edge trigger
Categorylogic    logic   
File Size49KB,7 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
Environmental Compliance
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74HCT107D Overview

Dual JK flip-flop with reset; negative-edge trigger

74HCT107D Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instructionSOP, SOP14,.25
Reach Compliance Codeunknow
JESD-30 codeR-PDSO-G14
JESD-609 codee4
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Maximum Frequency@Nom-Su24000000 Hz
MaximumI(ol)0.004 A
Number of functions2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
power supply5 V
Certification statusNot Qualified
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Trigger typeNEGATIVE EDGE
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT107
Dual JK flip-flop with reset;
negative-edge trigger
Product specification
File under Integrated Circuits, IC06
December 1990

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