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SSLDM-LVQ-120J

Description
Active Delay Line, 1-Func, 2-Tap, True Output, J LEAD, MODULE-8/6
Categorylogic    logic   
File Size154KB,2 Pages
ManufacturerEngineered Components Co.
Download Datasheet Parametric View All

SSLDM-LVQ-120J Overview

Active Delay Line, 1-Func, 2-Tap, True Output, J LEAD, MODULE-8/6

SSLDM-LVQ-120J Parametric

Parameter NameAttribute value
Parts packaging codeSOIC
package instructionSOJ,
Contacts6
Reach Compliance Codeunknown
JESD-30 codeR-XDSO-J6
length12.7 mm
Logic integrated circuit typeACTIVE DELAY LINE
Number of functions1
Number of taps/steps2
Number of terminals6
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityTRUE
Package body materialUNSPECIFIED
encapsulated codeSOJ
Package shapeRECTANGULAR
Package formSMALL OUTLINE
programmable delay lineNO
Certification statusNot Qualified
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal pitch2.54 mm
Terminal locationDUAL
Total delay nominal (td)120 ns
width9.525 mm
Base Number Matches1
design notes
The LVQ "Space Saver Series" Logic Delay Modules developed by
Engineered Components Company have been designed to provide
precise delays with required driving and pick-off circuitry contained in
a single 8-pin package compatible with low voltage (3.3V) T2L
circuits. These logic delay modules are of hybrid construction utilizing
the proven technologies of active integrated circuitry and of passive
networks utilizing capacitive, inductive and resistive elements. The
MTBF on these modules, when calculated per MIL-HDBK-217 for a
50
o
C ground fixed environment, is in excess of 4 million hours. Module
design includes compensation for propagation delays and incorpo-
rates internal termination at the output; no additional external compo-
nents are needed to obtain the specified delay.
The SSLDM-LVQ is offered in 20 delays from 8 to 150ns with
each module incorporating total output and two (2) taps. Delay
tolerances are maintained as shown in the accompanying part
number table, when tested under the "Test Conditions" shown.
T2L LV CMOS input and outputs
Delays stable and precise
8-pin Space Saver package
Leads - thru-hole, J, Gull Wing or Tucked
Available in delays from 8 to 150ns
Output and 2 intermediate taps each
isolated and with 12mA output drive capability
Fast rise time on all outputs
Delay time is measured at the +1.5V level on the leading
edge. Outputs are capable of driving ±12mA. Tempera-
ture coefficient of delay is approximately +1200 ppm/
o
C over
the operating temperature range of -40 to +85
o
C.
These modules accept either logic "1" or logic "0" inputs and
reproduce the logic at the output without inversion. The delay
modules are intended primarily for use with positive going
pulses and are calibrated to the tolerances shown in the table
on rising edge delay; where best accuracy is desired in appli-
cations using falling edge timing, it is recommended that a
special unit be calibrated for the specific application.
These LVQ "Space Saver Series" modules are packaged in
an 8-pin housing, molded of flame-proof Diallyl Phthalate per
MIL-M-14, Type SDG-F, and are fully encapsulated in epoxy
resin. Thru-hole, J, Gull Wing or Tucked Lead configurations
are available on these modules (see Part Number Table note
to specify). Leads meet the solderability requirements of MIL-
STD-202, Method 208. Corner standoffs on the housing of the
thru-hole lead version and lead design of the surface mount
versions provide positive standoff from the printed circuit
board to permit solder-fillet formation and flush cleaning of
solder-flux residues for improved reliability.
Marking consists of manufacturer's name, logo (EC2), part
number, terminal identification and date code of manufacture.
All marking is applied by silk screen process using white epoxy
paint in accordance with MIL-STD-130, to meet the perma-
nency of identification required by MIL-STD-202, Method 215.
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