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74LCXH162373MEA

Description
Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs
Categorylogic    logic   
File Size113KB,11 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74LCXH162373MEA Overview

Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs

74LCXH162373MEA Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSSOP
package instruction0.300 INCH, MO-118, SSOP-48
Contacts48
Reach Compliance Codecompli
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G48
JESD-609 codee3
length15.875 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.012 A
Humidity sensitivity level2
Number of digits8
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE WITH SERIES RESISTOR
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP48,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su6.2 ns
propagation delay (tpd)7.6 ns
Certification statusNot Qualified
Maximum seat height2.74 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.495 mm
74LCXH162373 Low Voltage 16-Bit Transparent Latch with Bushold and 26Ω Series Resistor Outputs
February 2001
Revised March 2002
74LCXH162373
Low Voltage 16-Bit Transparent Latch
with Bushold and 26
Series Resistor Outputs
General Description
The LCXH162373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear transparent to the data when the Latch Enable (LE)
is HIGH. When LE is LOW, the data that meets the setup
time is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCXH162373 is designed for low voltage (2.5V or
3.3V) V
CC
applications with capability of interfacing to a 5V
signal environment. The 26
series resistor helps reduce
output overshoot and undershoot.
The LCXH162373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
The LCXH162373 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
Features
s
5V tolerant control inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
Equivalent 26
series resistors on outputs
s
Bushold on inputs eliminates the need for external
pull-up/pull-down resistors
s
6.2 ns t
PD
max (V
CC
=
3.3V), 20
µ
A I
CC
max
s
Power down high impedance inputs and outputs
s
±
12 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number
74LCXH162373GX
(Note 1)
74LCXH162373MEA
74LCXH162373MEX
74LCXH162373MTD
74LCXH162373MTX
Package
Number
BGA54A
(Preliminary)
MS48A
MS48A
MTD48
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[RAIL]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[RAIL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1:
BGA package available in Tape and Reel only.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation
DS500445
www.fairchildsemi.com

74LCXH162373MEA Related Products

74LCXH162373MEA 74LCXH162373 74LCXH162373GX 74LCXH162373MTD 74LCXH162373MEX 74LCXH162373MTX
Description Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs
Is it Rohs certified? conform to - incompatible incompatible conform to incompatible
Maker Fairchild - Fairchild - Fairchild Fairchild
Parts packaging code SSOP - BGA TSSOP SSOP TSSOP
package instruction 0.300 INCH, MO-118, SSOP-48 - LFBGA, BGA54,6X9,32 TSSOP, TSSOP48,.3,20 0.300 INCH, MO-118, SSOP-48 TSSOP, TSSOP48,.3,20
Contacts 48 - 54 48 48 48
Reach Compliance Code compli - compli _compli compli _compli
series LVC/LCX/Z - LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G48 - R-PBGA-B54 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
JESD-609 code e3 - e0 e0 e3 e0
length 15.875 mm - 8 mm 12.5 mm 15.875 mm 12.5 mm
Load capacitance (CL) 50 pF - 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type BUS DRIVER - BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
MaximumI(ol) 0.012 A - 0.012 A 0.012 A 0.012 A 0.012 A
Humidity sensitivity level 2 - - 2 2 2
Number of digits 8 - 8 8 8 8
Number of functions 2 - 2 2 2 2
Number of ports 2 - 2 2 2 2
Number of terminals 48 - 54 48 48 48
Maximum operating temperature 85 °C - 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C - -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE WITH SERIES RESISTOR - 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR
Output polarity TRUE - TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP - LFBGA TSSOP SSOP TSSOP
Encapsulate equivalent code SSOP48,.4 - BGA54,6X9,32 TSSOP48,.3,20 SSOP48,.4 TSSOP48,.3,20
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH - GRID ARRAY, LOW PROFILE, FINE PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply 3.3 V - 3.3 V 3.3 V 3.3 V 3.3 V
Prop。Delay @ Nom-Su 6.2 ns - 6.2 ns 6.2 ns 6.2 ns 6.2 ns
propagation delay (tpd) 7.6 ns - 7.6 ns 7.6 ns 7.6 ns 7.6 ns
Certification status Not Qualified - Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 2.74 mm - 1.4 mm 1.2 mm 2.74 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V - 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2 V - 2 V 2 V 2 V 2 V
Nominal supply voltage (Vsup) 2.5 V - 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES - YES YES YES YES
technology CMOS - CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL - INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - Tin/Lead (Sn/Pb) Tin/Lead (Sn85Pb15) Matte Tin (Sn) Tin/Lead (Sn85Pb15)
Terminal form GULL WING - BALL GULL WING GULL WING GULL WING
Terminal pitch 0.635 mm - 0.8 mm 0.5 mm 0.635 mm 0.5 mm
Terminal location DUAL - BOTTOM DUAL DUAL DUAL
width 7.495 mm - 5.5 mm 6.1 mm 7.495 mm 6.1 mm
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