Philips Semiconductors Military Bipolar Memory Products
Product specification
2K-bit TTL bipolar PROM (512x4)
82S130A
82S131A
FEATURES
•
Address access time: 35ns max
•
Input loading: -150µA max
•
On-chip address decoding
•
One chip enable input
•
Output options:
–
82S130A: Open collector
–
82S131A: 3-State
DESCRIPTION
The 82S130A and 82S131A are field-programmable, which means
that custom patterns are immediately available by following the
Philips Generic I fusing procedure. The standard 82S130A and
82S131A are supplied with all outputs at a logical Low. Outputs are
programmed to a logic High level at any specified address by fusing
the Ni-Cr link matrix.
These devices include on-chip decoding and 1 chip enable input for
ease of memory expansion. They feature either Open collector or
3-State outputs for optimization of word expansion in bused
organizations.
•
No separate fusing pins
•
Unprogrammed outputs are Low level
•
Fully TTL compatible
APPLICATIONS
ORDERING INFORMATION
DESCRIPTION
16-pin Ceramic DIP
(300mil-wide)
16-pin Ceramic Flat Pack
ORDER CODE
82S130A/BEA,
82S131A/BEA
82S130A/BFA,
82S131A/BFA
PACKAGE
DESIGNATOR*
GDIP1-T16
GDIP1-T16
GDFP2-F16
GDFP2-F16
•
Prototyping/volume production
•
Sequential controllers
•
Microprogramming
•
Hardwired algorithms
•
Control store
•
Random logic
•
Code conversion
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
I
V
O
V
O
T
A
T
STG
Supply voltage
Input voltage
Output voltage High (82S130A)
Output voltage Off-State (82S131A)
Operating temperature range
Storage temperature range
PARAMETER
* MIL-STD 1835 or Appendix A of 1995 Military Data Handbook
RATING
+7
+5.5
+5.5
+5.5
-55 to +125
-65 to +150
UNIT
V
DC
V
DC
V
DC
V
DC
°
C
°
C
PIN CONFIGURATION
BLOCK DIAGRAM
A
4
ADDRESS
LINES
1:32
DECODER
32 x 64
A
6
A
5
A
4
A
3
A
0
A
1
A
2
GND
1
2
3
4
5
6
7
8
16 V
CC
15 A
7
14 A
8
13 CE
12 O
1
11 O
2
10 O
3
9
O
4
A
8
A
0
A
1
A
2
A
3
1:16
MUX
1:16
MUX
1:16
MUX
1:16
MUX
CE
4 OUTPUT DRIVERS
O
1
O
2
O
3
O
4
OUTPUT LINES
November 10, 1987
1
853-0257 F00356
Philips Semiconductors Military Bipolar Memory Products
Product specification
2K-bit TTL bipolar PROM (512x4)
82S130A
82S131A
DC ELECTRICAL CHARACTERISTICS
SYMBOL
Input voltage
V
IL
V
IH
V
IK
Low
High
Clamp
PARAMETER
-55°C < T
A
< +125°C, 4.5V < V
CC
< 5.5V
TEST CONDITIONS
1, 2
Min
LIMITS
Typ
5
Max
0.8
2.0
V
CC
= 4.5V, I
I
= -18mA
CE = Low
I
O
= 16mA
V
CC
= 4.5V, I
O
= -2mA
V
CC
= 5.5V
V
I
= 0.45V
V
I
= 5.5V
V
CC
= 5.5V
CE = High, V
O
= 5.5V
CE = High, V
O
= 5.5V
CE = High, V
O
= 0.5V
V
CC
= 5.5V, CE = Low, V
O
= 0V, High stored
CE = High, V
CC
= 5.5V
CE = High, V
CC
= 5.0V
V
I
= 2.0V
V
O
= 2.0V
-55°C < T
A
< +125°C, 4.5V < V
CC
< 5.5V
TO
Output
Output
Output
FROM
Min
Address
Chip Enable
Chip Disable
LIMITS
Typ
5
18
10
6
Max
35
20
15
ns
ns
ns
UNIT
-1.2
V
V
V
UNIT
Output voltage
V
OL
V
OH
Input current
I
IL
I
IH
Low
High
-150
40
µA
µA
Low
High (82S131A)
0.5
2.4
V
V
Output current
I
OLK
I
OZ
I
OS
I
CC
Capacitance
6
C
IN
C
OUT
Input
Output
5
8
10
13
pF
pF
Leakage (82S130A)
Hi-Z state (82S131A)
Short circuit (82S131A)
3
40
40
-40
-85
130
µA
µA
µA
mA
mA
-15
Supply current
AC ELECTRICAL CHARACTERISTICS
SYMBOL
t
AA
t
CE
t
CD
Access time
4
Access time
4
Disable time
PARAMETER
NOTES:
1. Positive current is defined as into the terminal referenced.
2. All voltages with respect to network ground.
3. Duration of short circuit should not exceed 1 second.
4. Tested at an address cycle time of 1µs.
5. Typical values are at V
CC
= 5V, T
A
= +25
°
C.
6. Guaranteed, but not tested.
November 10, 1987
2
Philips Semiconductors Military Bipolar Memory Products
Product specification
2K-bit TTL bipolar PROM (512x4)
82S130A
82S131A
TEST LOAD CIRCUITS
VOLTAGE WAVEFORMS
2.7V
NEGATIVE
PULSE
t
W
V
M
0.3V
V
M
0.3V
t
TLH(tr)
0V
2.7V
3.0V
V
CC
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
CE
GND
DUT
O
1
O
2
O
3
O
4
R
2
INCLUDES SCOPE
C
L
AND JIG
CAPACITANCE
R
1
POSITIVE
PULSE
0.3V
5.0V
t
THL(tf)
t
TLH(tr)
2.7V
V
M
t
W
t
THL(tf)
3.0V
2.7V
V
M
0.3V
0V
Input Pulse Definitions
INPUT PULSE CHARACTERISTICS
V
M
1.5V
NOTE:
R
1
= 270Ω, R
2
= 600Ω, C
L
= 50pF.
Rep. Rate
1MHz
Pulse Width
500ns
t
TLH
≤5ns
t
THL
≤5ns
TIMING DIAGRAMS
3.0V
ADDRESS
V
M
0V
CE
0V
V
OH
V
M
V
OL
t
AA
V
M
= 1.5V
3.0V
ADDRESS
0V
3.0V
CE
V
M
V
M
0V
V
OH
Hi-Z
t
CE
V
M
V
M
t
CD
V
OH
V
M
t
CE
V
M
V
OL
t
CD
V
M
= 1.5V
Hi-Z
V
OL
November 10, 1987
3
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