NCP4423, NCP4424,
NCP4425
3 A Dual High-Speed
MOSFET Drivers
The NCP4423/4424/4425 are MOSFET drivers that are capable of
giving reliable service in demanding electrical environments.
Although primarily intended for driving power MOSFETs, these
drivers are well–suited for driving other loads (capacitive, resistive,
or inductive) which require a low impedance driver capable of high
peak currents and fast switching times. Applications such as heavily
loaded clock lines, coaxial cables, or piezoelectric transducers can all
be driven with the NCP4423/4424/4425. The only known limitation
on loading is that the total power dissipated of the driver must be kept
within the maximum power dissipation limits of the package.
Features
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MARKING
DIAGRAM
16
SO–16
DW SUFFIX
CASE 751G
1
1
NCP442x
YYWWXZ
16
•
•
•
•
•
•
•
•
•
•
High Peak Output Current (3 A)
Wide Operating Range (4.5 V to 18 V)
High Capacitive Load Drive Capability (1800 pF in 25 nsec)
Short Delay Times ( 40 nsec Typ)
Matched Rise/Fall Times
Low Supply Current
With Logic “1’’ Input (3.5 mA)
With Logic “0’’ Input (350
µA)
Low Output Impedance (3.5
Ω
Typ)
Latch–Up Protected: Will Withstand 1.5 A Reverse Current
Logic Input Will Withstand Negative Swing Up to 5 V
ESD Protected (4 kV)
8
PDIP–8
P SUFFIX
CASE 626
1
NCP442x
YYWWXZ
CO
t
8
1
x
YY, Y
WW
X
Z
CO
= Device Number (3, 4, or 5)
= Year
= Work Week
= Assembly ID Code
= Subcontractor ID Code
= Country of Origin
ORDERING INFORMATION
Device
Package
SO–16
SO–16
SO–16
PDIP–8
PDIP–8
PDIP–8
Shipping
1000 Tape & Reel
1000 Tape & Reel
1000 Tape & Reel
50 Units/Rail
50 Units/Rail
50 Units/Rail
FUNCTIONAL BLOCK DIAGRAM
VDD
INVERTING
300 mV
OUTPUT
INPUT
4.7 V
NCP4423 DUAL INVERTING
NCP4424 DUAL NONINVERTING
NCP4425 ONE INV., ONE NONINV
GND
EFFECTIVE
INPUT C = 20 pF
(EACH INPUT)
NOTES:
1. NCP4425 has one inverting and one noninverting driver.
2. Ground any unused driver input.
©
Semiconductor Components Industries, LLC, 2000
NCP4423DWR2
NCP4424DWR2
NCP4425DWR2
NCP4423P
NCP4424P
NCP4425P
NONINVERTING
1
June, 2000 – Rev. 0
Publication Order Number:
NCP4423/D
NCP4423, NCP4424, NCP4425
PIN CONNECTIONS
4423
4424
NC
OUT A
OUT A
VDD
VDD
OUT B
OUT B
NC
4425
NC
OUT A
OUT A
VDD
VDD
OUT B
OUT B
NC
1
2
3
4
NCP4423
NCP4424
NCP4425
16–Pin SO Wide
NC
IN A
NC
GND
GND
NC
IN B
NC
1
2
3
4
5
6
7
8
(Top View)
NCP4423
NCP4424
NCP4425
8–Pin DIP
8
7
6
5
16 NC
15 OUT A
14 OUT A
13 VDD
12 VDD
11 OUT B
10 OUT B
9
NC
NC = NO CONNECTION
NOTE:
Duplicate pins must
both
be connected for proper
operation.
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2
NCP4423, NCP4424, NCP4425
ABSOLUTE MAXIMUM RATINGS
Rating
Supply Voltage
Input Voltage, IN A or IN B (VDD + 0.3 V to GND – 5.0 V)
Maximum Chip Temperature
Storage Temperature Range, Tstg
Lead Temperature (Soldering, 10 sec)
Package Thermal Resistance
SOIC, R
θJA
PDIP, R
θJA
PDIP, R
θJC
Operating Temperature Range
Package Power Dissipation (TA
SOIC
PDIP
Value
+22
–5
+150
–65 to +150
+300
155
–125
–45
Unit
V
V
°C
°C
°C
°C/W
v
70°C)
–40 to +85
470
730
°C
mW
mc
ELECTRICAL CHARACTERISTICS
(TA = +25°C with 4.5 V
Characteristic
Input
Logic 1 High Input Voltage
Logic 0 Low Input Voltage
Input Current
Output
High Output Voltage
Low Output Voltage
Output Resistance, High
Output Resistance, Low
Peak Output Current
Latch–Up Protection
Withstand Reverse Current
Switching Time
(Note 1.)
Rise Time
Fall Time
Delay Time 1
Delay Time 2
Power Supply
Power Supply Current
1. Switching times guaranteed by design.
IS
tR
tF
tD1
tD2
VOH
VOL
ROH
ROL
IPK
IREV
VOH
VIL
IIN
Symbol
v
VDD
v
18 V, unless otherwise specified.)
Min
Typ
Max
Unit
–
2.4
–
–1.0
–
–
–
–
0.8
1.0
V
V
µA
Test Conditions
0V
v
VIN
v
VDD
–
–
–
VDD –0.025
–
–
–
–
1.5
–
–
2.8
3.5
3.0
–
–
0.025
5.0
5.0
–
–
V
V
Ω
Ω
A
A
IOUT = 10 mA,
VDD = 18 V
IOUT = 10 mA,
VDD = 18 V
–
Duty Cycle
2%
t
300
µs
v
v
Figure 1, CL = 1800 pF
Figure 1, CL = 1800 pF
Figure 1, CL = 1800 pF
Figure 1, CL = 1800 pF
–
–
–
–
23
25
33
38
35
35
75
75
nsec
nsec
nsec
nsec
VIN = 3.0 V (Both Inputs)
VIN = 0 V (Both Inputs)
–
–
1.5
0.15
2.5
0.25
mA
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3
NCP4423, NCP4424, NCP4425
ELECTRICAL CHARACTERISTICS
(Over operating temperature range with 4.5 V
Characteristic
Input
Logic 1 High Input Voltage
Logic 0 Low Input Voltage
Input Current
Output
High Output Voltage
Low Output Voltage
Output Resistance, High
Output Resistance, Low
Peak Output Current
Latch–Up Protection
Withstand Reverse Current
Switching Time
(Note 1.)
Rise Time
Fall Time
Delay Time 1
Delay Time 2
Power Supply
Power Supply Current
1. Switching times guaranteed by design.
IS
VIN = 3.0 V (Both Inputs)
VIN = 0 V (Both Inputs)
–
–
2.0
0.2
3.5
0.3
mA
tR
tF
tD1
tD2
Figure 1, CL = 1800 pF
Figure 1, CL = 1800 pF
Figure 1, CL = 1800 pF
Figure 1, CL = 1800 pF
–
–
–
–
28
32
32
38
60
60
100
100
nsec
nsec
nsec
nsec
VOH
VOL
RO
RO
IPK
IREV
–
–
IOUT = 10 mA,
VDD = 18 V
IOUT = 10 mA,
VDD = 18 V
–
VDD –0.025
–
–
–
–
1.5
–
–
3.7
4.3
3.0
–
–
0.025
8.0
8.0
–
–
V
V
Ω
Ω
A
A
VIH
VIL
IIN
0V
–
2.4
–
–10
–
–
–
–
0.8
10
V
V
µA
Symbol
Test Conditions
v
VDD
v
18 V, unless otherwise specified.)
Min
Typ
Max
Unit
v
VIN
v
VDD
–
Duty Cycle
2%
t
300
µsec
v
v
Test Circuit
VDD = 16 V
1
µF
WIMA
MKS–2
0.1
µF
CERAMIC
OUTPUT
CL = 1800 pF
Test Circuit
VDD = 16 V
1
µF
WIMA
MKS–2
0.1
µF
CERAMIC
OUTPUT
CL = 1800 pF
INPUT
INPUT: 100 kHz,
square wave,
tRISE = tFALL
≤
10 ns
1
2
NCP4423
(1/2 NCP4425)
INPUT
INPUT: 100 kHz,
square wave,
tRISE = tFALL
≤
10 ns
1
2
NCP4424
(1/2 NCP4425)
+5 V
INPUT
0V
16 V
OUTPUT
0V
10%
10%
tD1
90%
tF
90%
+5 V
INPUT
90%
10%
90%
tD1
10%
tR
90%
tD2
10%
tD2
0V
tR
90%
10%
16 V
OUTPUT
0V
tF
Figure 1. Inverting Driver Switching Time
Figure 2. Noninverting Driver Switching Time
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NCP4423, NCP4424, NCP4425
TYPICAL ELECTRICAL CHARACTERISTICS
100
4700 pF
80
1000 pF
t RISE (nsec)
t FALL (nsec)
60
3300 pF
1500 pF
2200 pF
40
60
3300 pF
2200 pF
40
1500 pF
80
1000 pF
100
4700 pF
20
470 pF
0
4
6
8
10
12
VDD
14
16
18
20
470 pF
0
4
6
8
10
12
VDD
14
16
18
Figure 3. Rise Time vs. Supply Voltage
100
5V
100
Figure 4. Fall Time vs. Supply Voltage
80
t RISE (nsec)
80
t FALL (nsec)
5V
60
10 V
15 V
60
10 V
15 V
40
40
20
0
100
20
0
100
1000
CLOAD (pF)
10000
1000
CLOAD (pF)
10000
Figure 5. Rise Time vs. Capacitive Load
32
CLOAD = 2200 pF
30
28
TIME (ns)
26
24
22
20
18
tRISE
tFALL
tRISE
tFALL
80
DELAY TIME (ns)
100
Figure 6. Fall Time vs. Capacitive Load
CLOAD = 2200 pF
VDD = 10 V
tD1
60
40
tD2
20
1 2
3
0
4
INPUT WAS CUT OFF, PLEASE SUBMIT NUMBERS
0
5
6
7
8
9
10 11
12
Figure 7. Rise and Fall Times vs. Temperature
Figure 8. Progation Delay vs. Input Amplitude
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