EEWORLDEEWORLDEEWORLD

Part Number

Search

DIP14-530

Description
Passive Delay Line, 1-Func, 10-Tap, True Output, 0.200 INCH HEIGHT, DIP-14
Categorylogic    logic   
File Size303KB,4 Pages
ManufacturerEngineered Components Co.
Download Datasheet Parametric View All

DIP14-530 Overview

Passive Delay Line, 1-Func, 10-Tap, True Output, 0.200 INCH HEIGHT, DIP-14

DIP14-530 Parametric

Parameter NameAttribute value
Parts packaging codeDIP
package instructionDIP,
Contacts14
Reach Compliance Codeunknown
Other featuresMEETS MIL-D-23859; MAX DISTORTION 5%; MAX RISE TIME AND TEMP. COEFF. CAPTURED
JESD-30 codeR-XDIP-T14
length22.86 mm
Logic integrated circuit typePASSIVE DELAY LINE
Number of functions1
Number of taps/steps10
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output impedance nominal value (Z0)50 Ω
Output polarityTRUE
Package body materialUNSPECIFIED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
programmable delay lineNO
Certification statusNot Qualified
surface mountNO
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Total delay nominal (td)30 ns
width7.62 mm
Base Number Matches1
【BLE 5.3 wireless MCU CH582】14. BLE serial port transparent transmission test
Series of articles: 【BLE 5.3 wireless MCU CH582】1. Getting to know the CH582 development board (unboxing) 【BLE 5.3 wireless MCU CH582】2. MounRiver IDE first experience 【BLE 5.3 wireless MCU CH582】3. N...
freeelectron Domestic Chip Exchange
Design and implementation of FIR filter based on DSP
[size=4]I. Abstract[/size] [size=4] Using DSP for FIR algorithm[/size] [size=4] [/size] [size=4]II. Experimental platform[/size] [size=4] Matlab7.1 + CCS3.1[/size] [size=4] [/size] [size=4]III. Experi...
Jacktang DSP and ARM Processors
【Transfer】Electronic Design Competition Process
[i=s]This post was last edited by paulhyde on 2014-9-15 09:06[/i] [size=4][color=blue]Pre-competition preparation:[/color] 1. Ability to work all night. 2. Ability to learn quickly. 3. Ability to coor...
open82977352 Electronics Design Contest
MCU Hardware Anti-interference Experience
2006-12-27 14:52:00 Source: China Power Grid  When developing electronic products with processors, how to improve anti-interference ability and electromagnetic compatibility? 1. The following systems ...
fighting Energy Infrastructure?
Use 1117 solar panels
A while ago, I bought a solar panel that can be fixed to a backpack and has a USB power output.Generally, solar power chips need to support MPPT function to improve efficiency, so I took it apart to s...
dcexpert Energy Infrastructure?
Implementation of asynchronous serial port.zip
...
至芯科技FPGA大牛 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1023  1635  2120  2726  1540  21  33  43  55  32 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号