UT1553/RTMP-WCA datasheet, PDF

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UT1553/RTMP-WCA: DescriptionSerial IO/Communication Controller, CMOS, CQFP84,; CategoryThe embedded processor and controller Microcontrollers and processors; File Size302KB，40 Pages; ManufacturerAeroflex; Websitehttp://www.aeroflex.com/

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UT1553/RTMP-WCA Overview

Serial IO/Communication Controller, CMOS, CQFP84,

UT1553/RTMP-WCA Parametric

Parameter Name	Attribute value
package instruction	QFF, QFL84,1.2SQ
Reach Compliance Code	unknown
JESD-30 code	S-XQFP-F84
Number of terminals	84
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC
encapsulated code	QFF
Encapsulate equivalent code	QFL84,1.2SQ
Package shape	SQUARE
Package form	FLATPACK
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum slew rate	50 mA
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	QUAD
Base Number Matches	1

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UT1553 Remote Terminal Multi-Protocol

EATURES

Complete MIL-STD-1553 Remote Terminal Interface

Mode selectable to comply with either MIL-STD-

1553A or MIL-STD-1553B bus protocol

Mil-STD-1773 compatible

Remote terminal operation is certified by ASD/

ENASC (SEAFAC)

Implements all dual-redundant Remote Terminal mode

codes and operational functions including broadcast

commands

Provides handshake control for quad-redundant

systems

Data pointers permit programmable memory mapping

for 1553 data over the entire 64K host memory space

Provides all handshaking signals for a DMA interface

Stores 1553 command word and time-tag information

with all incoming data for enhanced data management

Three-state address bus, databus, and control signals

simplify DMA operations

Supports end-of-command activity and data bus error

interrupts

Self-test capability

Available as a gate array macrocell

Available in 84-pin pingrid array, 84-lead leadless chip

carrier, or 84-lead flatpack packages

Standard Microcircuit Drawing 5962-88645 available

- QML Q compliant

NTRODUCTION

The UT1553 RTMP (figures 1 and 4) is a monolithic,

CMOS, VLSI integrated circuit that meets all requirements

for a dual-redundant MIL-STD-1553 Remote Terminal

interface. The RTMP’s advanced design supports both

MIL-STD-1553A and MIL-STD-1553B serial data bus

protocols, including differences in the status word response

time and bit definitions, providing the system designer a

single-chip solution to most Remote Terminal interface

requirements.

The UT1553 RTMP provides all requisite 1553 protocol and

data handling, 1553 message error checking, DMA

handshake and control signals, and comprehensive self-test

capabilities. The RTMP’s pointer-based, programmable

memory-mapping architecture permits the host to map 1553

message data anywhere in the 64K memory space. This

advanced memory mapping, along with the RTMP’s control

and status functions, minimize the host system’s 1553

interface overhead.

The UT1553 RTMP is a member of UTMC’s complete

family of high-reliability monolithic MIL-STD-1553

interface products.

MODE CODE/

SUBADDRESS

OUT

OUTPUT MULTIPLEXING AND

SELF- TES T WRAPAROUNDLOG IC

CHANNEL

DECODER

TERMINAL

ADDRESS

MEMORY

ADDRESS

CONTROL

TIME TAG

CONTROL

BASE PTR

STATUS

LAST CMD

MEMORY

ADDRESS

COMMAND

RECOGNITION

DECODER

MUX

CONTROL

AND ERROR

LOGIC

CONTROL

INPUTS

CONTROL

OUTPUTS

OUT

CHANNEL

CLOCK AND

RESET

LOGIC

ENCODER

DATA

TRANSFER

LOGIC

DATA

TIMER

LOGIC

MASTER 12MHz

RESET

Figure 1. UT1553 RTMP Functional Block Diagram

RTMP-1

Table of Contents

1.0

2.0

3.0

FUNCTIONAL DESCRIPTION

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3

PIN IDENTIFICATION AND DESCRIPTION.

. . . . . . . . . . . . . . . . . . . . . . . . . . .5

REMOTE TERMINAL ARCHITECTURE

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.1 Internal Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.2 Read/Write Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.3 Time Tag Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.4 Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

3.5 Base Pointer Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

3.6 Read Only Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

3.6.1 Operational Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

3.6.2 Last 1553 Command Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

3.7 Write Only Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

REMOTE TERMINAL INTERFACE OPERATION.

. . . . . . . . . . . . . . . . . . . . .17

4.1 Programming the BPD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

4.2 RTMP Pointer Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

4.3 Pointer Block Location Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

4.4 RTMP Data Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

4.5 RTMP Interrupt Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

4.6 RTMP Error Detection Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

4.6.1 Terminal Address Parity Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

4.6.2 Framing or Overrun Error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

4.6.3 1553 Message Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

4.7 RTMP Self-Test Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

1553A AND 1553B MODES OF OPERATION

. . . . . . . . . . . . . . . . . . . . . . . . . . .25

5.1 Status Word Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

5.2 Mode Code Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

5.3 Status Word Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

RTMP SYSTEM INTERFACE

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

6.1Assigning the Terminal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

6.2Controlling the DMA Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

6.3Interfacing with the RTMP’s Internal Register . . . . . . . . . . . . . . . . . . . . . . . . . . .29

6.4RTMP Hardware Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

6.4.1 RTMP -- 1553 Transceiver Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

6.4.2 RTMP DMA Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

MAXIMUM AND RECOMMENDED OPERATING CONDITIONS31

DC ELECTRICAL CHARACTERISTICS

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3

AC ELECTRICAL CHARACTERISTICS

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

PACKAGE OUTLINE DRAWINGS.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39

4.0

5.0

6.0

7.0

8.0

9.0

10.0

RTMP-2

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