(Circuit tied to pins 1, 2, and 5; Pins 2, 3, and 5; Pins 2, 4, and 5; or Pins 2, 5, and 6) (VF = 0.9 V Max @ IF = 10 mA)
Breakdown Voltage
VZT (5)
(V)
Device
MMQA5V6T1,T3
MMQA6V2T1,T3
MMQA6V8T1,T3
MMQA12VT1,T3
MMQA13VT1,T3
MMQA15VT1,T3
MMQA18VT1,T3
MMQA20VT1,T3
MMQA21VT1,T3
MMQA22VT1,T3
MMQA24VT1,T3
MMQA27VT1,T3
MMQA30VT1,T3
MMQA33VT1,T3
(5)
(6)
(7)
Max Reverse
Leakage Current
IR
(nA)
2000
700
500
75
75
75
75
75
75
75
75
75
75
75
VR
(V)
3.0
4.0
4.3
9.1
9.8
11
14
15
16
17
18
21
23
25
Max Zener
Impedance (7)
Max Reverse
Surge
Current
IRSM(4)
(A)
3.0
2.66
2.45
1.39
1.29
1.1
0.923
0.84
0.792
0.758
0.694
0.615
0.554
0.504
@ IZT
Max
5.88
6.51
7.14
12.6
13.7
15.8
18.9
21
22.1
23.1
25.2
28.4
31.5
34.7
(mA)
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max Reverse
Voltage @
IRSM(6)
(Clamping
Voltage)
VRSM
(V)
8.0
9.0
9.8
17.3
18.6
21.7
26
28.6
30.3
31.7
34.6
39
43.3
48.6
Maximum
Temperature
p
Coefficient of
VZ
(mV/°C)
1.26
10.6
10.9
14
15
16
19
20.1
21
22
25
28
32
37
Min
5.32
5.89
6.46
11.4
12.4
14.3
17.1
19
20
20.9
22.8
25.7
28.5
31.4
Nom
5.6
6.2
6.8
12
13
15
18
20
21
22
24
27
30
33
ZZT @ IZT
(Ω)
(mA)
400
300
300
80
80
80
80
80
80
80
100
125
150
200
VZ measured at pulse test current IT at an ambient temperature of 25°C.
Surge current waveform per Figure 5 and derate per Figure 4.
ZZT is measured by dividing the AC voltage drop across the device by the AC current supplied. The specified limits are IZ(AC) = 0.1 IZ(DC), with AC frequency = 1 kHz.
NOTE: SPECS LISTED ABOVE ARE PRELIMINARY
TYPICAL CHARACTERISTICS
300
250
C, CAPACITANCE (pF)
200
150
100
50
0
5.6
0
6.8
12
20
27
VZ, NOMINAL ZENER VOLTAGE (V)
33
5.6
6.8
20
27
33
VZ, NOMINAL ZENER VOLTAGE (V)
BIASED AT 0 V
BIASED AT 1 V
BIASED AT 50%
OF VZ NOM
10,000
1,000
I R , LEAKAGE (nA)
+150°C
100
+25°C
10
–40°C
Figure 1. Typical Capacitance
Figure 2. Typical Leakage Current
MOTOROLA
2
MMQA Series
TYPICAL CHARACTERISTICS
PEAK PULSE DERATING IN % OF PEAK POWER
OR CURRENT @ TA = 25
°
C
300
PD , POWER DISSIPATION (mW)
250
ALUMINA SUBSTRATE
200
150
100
FR-5 BOARD
50
0
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 3. Steady State Power Derating Curve
Figure 4. Pulse Derating Curve
% OF PEAK PULSE CURRENT
tr
100
VALUE (%)
PEAK VALUE — IRSM
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAYS TO 50%
OF IRSM.
tr
≤
10
µs
IRSM
2
100
90
80
70
60
50
40
30
20
10
0
tr
PEAK VALUE IRSM @ 8
m
s
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8
m
s
HALF VALUE IRSM/2 @ 20
m
s
HALF VALUE —
50
tP
0
tP
0
1
2
3
t, TIME (ms)
4
0
20
40
t, TIME (
m
s)
60
80
Figure 5. 10
×
1000
m
s Pulse Waveform
Figure 6. 8
×
20
m
s Pulse Waveform
100
PPK , PEAK SURGE POWER (W)
RECTANGULAR
WAVEFORM, TA = 25°C
Ppk PEAK SURGE POWER (W)
200
180
160
140
120
100
80
60
40
20
0
10
×
100 WAVEFORM AS PER FIGURE 5
8
×
20 WAVEFORM AS PER FIGURE 6
10
UNIDIRECTIONAL
1.0
0.1
1.0
10
PW, PULSE WIDTH (ms)
100
1000
5.6
6.8
12
20
NOMINAL VZ
27
33
Figure 7. Maximum Non–Repetitive Surge
Power, Ppk versus PW
Power is defined as VRSM x IZ(pk) where VRSM
is the clamping voltage at IZ(pk).
Figure 8. Typical Maximum Non–Repetitive
Surge Power, Ppk versus VBR
MMQA Series
MOTOROLA
3
TYPICAL COMMON ANODE APPLICATIONS
A quad junction common anode design in a SC-59 pack-
age protects four separate lines using only one package.
This adds flexibility and creativity to PCB design especially
when board space is at a premium. A simplified example of
MMQA Series Device applications is illustrated below.
Computer Interface Protection
A
KEYBOARD
TERMINAL
PRINTER
ETC.
B
I/O
C
D
FUNCTIONAL
DECODER
GND
MMQA SERIES DEVICE
Microprocessor Protection
VDD
VGG
ADDRESS BUS
RAM
ROM
DATA BUS
I/O
CPU
CLOCK
CONTROL BUS
GND
MMQA SERIES DEVICE
MOTOROLA
4
MMQA Series
INFORMATION FOR USING THE SC-59 6 LEAD SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to ensure proper solder connection inter-
0.094
2.4
face between the board and the package. With the correct
pad geometry, the packages will self-align when subjected to
a solder reflow process.
0.037
0.95
0.074
1.9
0.037
0.95
0.028
0.7
0.039
1.0
inches
mm
SC-59 6 LEAD
SC-59 6 LEAD POWER DISSIPATION
The power dissipation of the SC-59 6 Lead is a function of
the pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, R
θJA
, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SC-59 6 Lead
package, PD can be calculated as follows:
PD =
TJ(max) – TA
R
θJA
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
= 225 milliwatts
556°C/W
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
The 556°C/W for the SC-59 6 Lead package assumes the
use of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225 milliwatts.
There are other alternatives to achieving higher power
dissipation from the SC-59 6 Lead package. Another alterna-
tive would be to use a ceramic substrate or an aluminum
core board such as Thermal Clad™. Using a board material
such as Thermal Clad, an aluminum core board, the power
dissipation can be doubled using the same footprint.
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads.
Solder stencils are used to screen the optimum amount.
These stencils are typically 0.008 inches thick and may be
made of brass or stainless steel. For packages such as the
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Embedded System
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