EEWORLDEEWORLDEEWORLD

Part Number

Search

520C343T200FN2D

Description
Long-life, Inverter Grade, Aluminum Ultra-Ripple, Long-life, Inverter Grade
File Size353KB,7 Pages
ManufacturerCDE [ CORNELL DUBILIER ELECTRONICS ]
Download Datasheet View All

520C343T200FN2D Overview

Long-life, Inverter Grade, Aluminum Ultra-Ripple, Long-life, Inverter Grade

Ultra-Ripple, Long-life, Inverter Grade, 85 ºC
Type 520C
85 °C Long-life, Inverter Grade, Aluminum
Best Value High Ripple Type
Type 520C is the 85 °C version of the Type 550C Inverter-
Grade capacitor. It delivers the ripple-current capability and
exceptional life needed for motor-drive bus capacitors and
approaches the performance of the 550C at lower cost. It is
rated for 8000 hours life with full ripple current, rated voltage,
85 °C and 100 lfm airflow while mounted horizontally.
Horizontal mounting is more severe than vertical mounting.
The extended cathode foil of the 520C assures heat flow
from the capacitor element to the can in all orientations.
• 8,000 hour load life
• Ripple current to 55 amps
• ESRs to 8 mΩ
• Best value high ripple current
• Thermal-Pak™ extended cathode construction
–40 °C to +85 °C
200 to 500 Vdc
84 µF to 39,000 µF
–10% +50%
≤3√CV (µA) 5 mA max., 5 minutes
–20 °C multiple of 25 °C Z ≤3
Ambient Temperature
45 °C
1.80
55 °C
1.63
65 °C
1.45
75 °C
1.25
85 °C
1.00
10 kHz
50 Hz 60 Hz 120 Hz 360 Hz 1 kHz 5 kHz
1 3/8” & 1 3/4” Diameters
200 to 350 V
400 to 500 Vx
2” & 2 1/2” Diameters
200 to 350 V
400 to 500 V
3” & 3 1/2” Diameters
200 to 350 V
400 to 500 V
0.84
0.79
0.88
0.84
1.00
1.00
1.12
1.18
1.17
1.26
1.20
1.31
1.20
1.32
0.78
0.77
0.83
0.82
1.00
1.00
1.20
1.22
1.29
1.33
1.34
1.39
1.35
1.40
0.76
0.76
0.81
0.81
1.00
1.00
1.24
1.24
1.36
1.37
1.43
1.44
1.44
1.45
& up
Highlights
Specifications
Operating Temperature:
Rated Voltage:
Capacitance:
Capacitance Tolerance:
Leakage Current:
Cold Impedence:
Ripple Current Multipliers:
Frequency
EIA Ripple Life:
8,000 h at full load @ +85 °C per EIA IS-749
∆Capacitance ±20%
ESR 200% of limit
DCL 100% of limit
Life Test:
10,000 h at rated voltage and 85 °C
Complies with the EU Directive
∆ Capacitance: ±20%
2002/95/EC requirement restricting
ESR: 200% of limit
the use of Lead (Pb), Mercury (Hg),
Cadmium (Cd), Hexavalent chromium
DCL: 100% of limit
(Cr(VI)), PolyBrominated Biphenyls
Shelf Life:
500 h @ 85 °C, capacitance, ESR and DCL, initial require-
(PBB) and PolyBrominated Diphenyl
ments
Ethers (PBDE).
Vibration:
10 to 55 Hz, 0.06” and 10 g max, 1.5 h ea. of 2 axis
CDM Cornell Dubilier
140 Technology Place
Liberty, SC 29657
Phone: (864)843-2277
Fax: (864)843-3800
www.cde.com
Why does the vxworks application program interface sometimes freeze after starting?
The freeze phenomenon is that you should press the key on the keyboard and then execute the corresponding subroutine, but at this time, no matter which key you press, it doesn't work! However, this fr...
wholefasten Real-time operating system RTOS
Comrades who use Altera's MAX2 series CPLDEPM570, come and take a look. You will get points if you give a small answer!
I'm working on something that uses Altera's MAX2 series CPLD EPM570. When I was drawing the circuit diagram, I found a problem. The components I found in the Altera component library omitted the power...
gdgaodeyong Embedded System
Using fiber optic transceivers to achieve long-distance networking
In previous engineering construction, a large number of fiber optic transceivers were used for networking. Xiangzi is quite familiar with this type of equipment. Therefore, based on the experience of ...
songbo RF/Wirelessly
What does the MCU REFO pin stabilization time mean? How is it related to the connected capacitor?
What does the MCU REFO pin stabilization time mean? How is it related to the connected capacitor?...
QWE4562009 Integrated technical exchanges
[Project source code] Static address alignment and dynamic address alignment of NIOS II custom IP core
This article and design code were written by FPGA enthusiast Xiao Meige. Without the author's permission, this article is only allowed to be copied and reproduced on online forums, and the original au...
小梅哥 FPGA/CPLD
Research on FFT Algorithm in Embedded Systems (Summary by the First Prize Winner of the National Electronic Design Competition)
[i=s]This post was last edited by paulhyde on 2014-9-15 09:53[/i][align=left]This article is the author's summary after winning the first prize of the National Electronic Design Competition. Floating-...
xiangzi Electronics Design Contest

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1376  1005  2806  1830  2319  28  21  57  37  47 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号