EEWORLDEEWORLDEEWORLD

Part Number

Search

74VHC74T

Description
AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Categorylogic    logic   
File Size72KB,10 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet Parametric Compare View All

74VHC74T Overview

AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14

74VHC74T Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSTMicroelectronics
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP14,.25
Contacts14
Reach Compliance Code_compli
seriesAHC/VHC
JESD-30 codeR-PDSO-G14
JESD-609 codee0
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Su75000000 Hz
MaximumI(ol)0.008 A
Number of digits1
Number of functions2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply2/5.5 V
Prop。Delay @ Nom-Su10.5 ns
propagation delay (tpd)17.5 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
width4.4 mm
minfmax110 MHz
Base Number Matches1
®
74VHC74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
=170 MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2
µA
(MAX.) at T
A
= 25
o
C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
IMPROVED LATCH-UP IMMUNITY
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHC74M
74VHC74T
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
It is ideal for low power applications maintaining
high speed operation similar to equivalent Bipolar
Schottky TTL.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74VHC74 is an advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and
double-layer metal
wiring
C
2
MOS
technology.
A signal on the D INPUT is transfered to the Q
OUTPUT during the positive going transition of
the clock pulse.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 1999
1/10

74VHC74T Related Products

74VHC74T 74VHC74M
Description AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Is it Rohs certified? incompatible conform to
Maker STMicroelectronics STMicroelectronics
Parts packaging code TSSOP SOIC
package instruction TSSOP, TSSOP14,.25 SOP, SOP14,.25
Contacts 14 14
Reach Compliance Code _compli compli
series AHC/VHC AHC/VHC
JESD-30 code R-PDSO-G14 R-PDSO-G14
JESD-609 code e0 e4
length 5 mm 8.65 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP
Maximum Frequency@Nom-Su 75000000 Hz 75000000 Hz
MaximumI(ol) 0.008 A 0.008 A
Number of digits 1 1
Number of functions 2 2
Number of terminals 14 14
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Output polarity COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP
Encapsulate equivalent code TSSOP14,.25 SOP14,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
power supply 2/5.5 V 2/5.5 V
Prop。Delay @ Nom-Su 10.5 ns 10.5 ns
propagation delay (tpd) 17.5 ns 17.5 ns
Certification status Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2 V 2 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 1.27 mm
Terminal location DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE
width 4.4 mm 3.9 mm
minfmax 110 MHz 110 MHz
Base Number Matches 1 1
[Anxinke NB-IoT Development Board EC-01F-Kit] 1. Unboxing and Hardware Appreciation
I would like to thank EEWorld and Acre for giving me the opportunity to review the NB-IOT development board. After receiving the express package, I opened it immediately. The packaging of the developm...
kit7828 RF/Wirelessly
The WINCE kernel of the BoChuang pxa270 development board does not support VGA output. Please help.
I don't know anything about WINCE system drivers. My company bought the PXA270 development board from Broadcom two days ago, but didn't buy an LCD screen. I used a normal computer monitor under LINUX,...
raiderchina Embedded System
AN-1160: ADuCxxx Serial Download Protocol Based on Cortex-M3
[b][color=#000000]AN-1160:[/color][/b][color=#4e4e4e][backcolor=rgb(246, 246, 246)][font=Arial, Helvetica, sans-serif][size=12px][url=http://www.analog.com/static/imported-files/zh/application_notes/A...
蓝雨夜 ADI Reference Circuit
microbit automatic plant irrigation machine
[size=14px]Use microbit to automatically water plants according to soil dryness and humidity. [/size] [size=14px]Connection diagram[/size] [img=600,450]http://www.micropython.org.cn/bbs/data/attachmen...
dcexpert MicroPython Open Source section
[Help] Overflow occurred during macro definition, and I want to use unsigned int. What should I do?
Overflow occurred during macro definition and I want to use unsigned int. What should I do?===...===......
jackylam Microcontroller MCU
Microsoft's upcoming HoloLens v2 may have been leaked
Microsoft has not confirmed that they are working on HoloLens v2, and has revealed that the 2nd generation product uses an improved holographic processing unit and an improved Kinect-based depth sensi...
tlyl18108837711 Integrated technical exchanges

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1011  72  900  1852  1722  21  2  19  38  35 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号