Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
FEATURES
• Very low threshold voltage
• Fast switching
• Logic level compatible
• Subminiature surface mount
package
BSH206
SYMBOL
s
QUICK REFERENCE DATA
V
DS
= -12 V
I
D
= -0.75 A
R
DS(ON)
≤
0.5
Ω
(V
GS
= -2.5 V)
V
GS(TO)
≥
0.4 V
d
g
GENERAL DESCRIPTION
P-channel, enhancement mode,
logic level, field-effect power
transistor. This device has low
threshold voltage and extremely
fast switching making it ideal for
battery powered applications and
high speed digital interfacing.
The BSH206 is supplied in the
SOT363 subminiature surface
mounting package.
PINNING
PIN
1,2,5,6 drain
3
4
gate
source
DESCRIPTION
SOT363
6
5
4
Top view
1
2
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
, T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
CONDITIONS
R
GS
= 20 kΩ
T
a
= 25 ˚C
T
a
= 100 ˚C
T
a
= 25 ˚C
T
a
= 25 ˚C
T
a
= 100 ˚C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
-12
-12
±
8
-0.75
-0.47
-3
0.417
0.17
150
UNIT
V
V
V
A
A
A
W
W
˚C
THERMAL RESISTANCES
SYMBOL
R
th j-a
PARAMETER
Thermal resistance junction to
ambient
CONDITIONS
FR4 board, minimum
footprint
TYP.
300
MAX.
-
UNIT
K/W
August 1998
1
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
ELECTRICAL CHARACTERISTICS
T
j
= 25˚C unless otherwise specified
SYMBOL PARAMETER
V
(BR)DSS
V
GS(TO)
R
DS(ON)
Drain-source breakdown
voltage
Gate threshold voltage
Drain-source on-state
resistance
CONDITIONS
V
GS
= 0 V; I
D
= -10
µA
V
DS
= V
GS
; I
D
= -1 mA
T
j
= 150˚C
V
GS
= -4.5 V; I
D
= -430 mA
V
GS
= -2.5 V; I
D
= -430 mA
V
GS
= -1.8 V; I
D
= -210 mA
V
GS
= -2.5 V; I
D
= -430 mA; T
j
= 150˚C
Forward transconductance
V
DS
= -9.6 V; I
D
= -430 mA
Gate source leakage current V
GS
=
±8
V; V
DS
= 0 V
Zero gate voltage drain
V
DS
= -9.6 V; V
GS
= 0 V;
current
T
j
= 150˚C
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Input capacitance
Output capacitance
Feedback capacitance
I
D
= -0.5 A; V
DD
= -10 V; V
GS
= -4.5 V
MIN.
-12
-0.4
-0.1
-
-
-
-
0.5
-
-
-
-
-
-
-
-
-
-
-
-
-
BSH206
TYP. MAX. UNIT
-
-
V
V
V
Ω
Ω
Ω
Ω
S
nA
nA
µA
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
g
fs
I
GSS
I
DSS
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
C
iss
C
oss
C
rss
-0.68
-
-
-
0.18
0.4
0.32
0.5
0.42
0.6
0.48 0.75
1.6
-
±10 ±100
-50
-100
-11
-100
3.8
0.4
1.0
2
4.5
45
20
200
95
41
-
-
-
-
-
-
-
-
-
-
V
DD
= -10 V; I
D
= -0.5 A;
V
GS
= -8 V; R
G
= 6
Ω
Resistive load
V
GS
= 0 V; V
DS
= -9.6 V; f = 1 MHz
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25˚C unless otherwise specified
SYMBOL
I
DR
I
DRM
V
SD
t
rr
Q
rr
PARAMETER
Continuous reverse drain
current
Pulsed reverse drain current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
CONDITIONS
T
a
= 25 ˚C
I
F
= -0.38 A; V
GS
= 0 V
I
F
= -0.5 A; -dI
F
/dt = 100 A/µs;
V
GS
= 0 V; V
R
= -9.6 V
MIN.
-
-
-
-
-
TYP.
-
-
-0.72
75
69
MAX.
-0.75
-3
-1.3
-
-
UNIT
A
A
V
ns
nC
August 1998
2
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH206
Normalised Power Dissipation, PD (%)
120
100
100
80
60
40
1
20
10
1000
Peak Pulsed Drain Current, IDM (A)
BSH105
D = 0.5
0.2
0.1
0.05
0.02
single pulse
T
P
D
tp
D = tp/T
0
0
25
50
75
100
125
150
Ambient Temperature, Ta (C)
0.1
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01
1E+00 1E+01
Pulse width, tp (s)
Fig.1. Normalised power dissipation.
PD% = 100
⋅
P
D
/P
D 25 ˚C
= f(T
a
)
Fig.4. Transient thermal impedance.
Z
th j-a
= f(t); parameter D = t
p
/T
Normalised Drain Current, ID (%)
120
100
80
60
40
20
Drain current, ID (A)
-1.4
4.5 V
-1.2
-2.5 V
-1.8 V
BSH205
Tj = 25 C
VGS = -1.4 V
-1
-1.3 V
-0.8
-0.6
-0.4
-0.2
-1.2 V
-1.1 V
-1 V
-0.9 V
0
0
25
50
75
100
125
150
0
0
-0.5
-1
-1.5
Drain-Source Voltage, VDS (V)
-2
Ambient Temperature, Ta (C)
Fig.2. Normalised continuous drain current.
ID% = 100
⋅
I
D
/I
D 25 ˚C
= f(T
a
); conditions: V
GS
≤
-10 V
Fig.5. Typical output characteristics, T
j
= 25 ˚C.
I
D
= f(V
DS
); parameter V
GS
Drain-Source On Resistance, RDS(on) (Ohms)
100
Peak Pulsed Drain Current, IDM (A)
BSH205
3
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
-0.9 V
-1V
-1.1 V
-1.2 V
-1.3 V
-1.4 V
BSH205
Tj = 25 C
10
RDS(on) = VDS/ ID
tp = 100 us
1 ms
1
10 ms
100 ms
-2.5 V
0.1
d.c.
-1.8 V
VGS = -4.5V
-0.2
-0.4
-0.6
-0.8
Drain Current, ID (A)
-1
-1.2
-1.4
0.01
0.1
1
10
Drain-Source Voltage, VDS (V)
100
Fig.3. Safe operating area. T
a
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.6. Typical on-state resistance, T
j
= 25 ˚C.
R
DS(ON)
= f(I
D
); parameter V
GS
August 1998
3
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH206
Drain Current, ID (A)
-3
-2.5
-2
-1.5
-1
-0.5
0
0
-0.5
-1
-1.5
-2
Gate-Source Voltage, VGS (V)
VDS > ID X RDS(on)
Tj = 25 C
150 C
BSH205
0.7
0.6
0.5
0.4
Threshold Voltage, VGS(to), (V)
typical
minimum
0.3
0.2
0.1
0
0
-2.5
-3
25
50
75
100
125
150
Junction Temperature, Tj (C)
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
)
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Transconductance, gfs (S)
3.5
VDS > ID X RDS(on)
3
2.5
2
1.5
1
0.5
0
0
Tj = 25 C
BSH205
1E-01
1E-02
150 C
1E-03
1E-04
1E-05
1E-06
Drain Current, ID (A)
BSH205
VDS = -5 V
Tj = 25 C
-0.2 -0.4 -0.6 -0.8 -1 -1.2 -1.4 -1.6 -1.8 -2 -2.2 -2.4 -2.6
Drain Current, ID (A)
1E-07
-1
-0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1
Gate-Source Voltage, VGS (V)
0
Fig.8. Typical transconductance, T
j
= 25 ˚C.
g
fs
= f(I
D
)
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C
Normalised Drain-Source On Resistance
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0
RDS(ON) @ Tj
RDS(ON) @ 25C
VGS = -4.5 V
-1.8 V
Capacitances, Ciss, Coss, Crss (pF)
1000
BSH205
-2.5 V
Ciss
100
Coss
Crss
25
50
75
100
125
150
Junction Temperature, Tj (C)
10
-0.1
-1.0
-10.0
Drain-Source Voltage, VDS (V)
-100.0
Fig.9. Normalised drain-source on-state resistance.
R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
)
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
August 1998
4
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH206
Gate-source voltage, VGS (V)
-6
-5
-4
-3
-2
-1
0
0
1
2
3
Gate charge, (nC)
4
VDD = 10 V
RD = 20 Ohms
Tj = 25 C
BSH205
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Source-Drain Diode Current, IF (A)
BSH205
150 C
Tj = 25 C
0
5
0.2
0.4
0.6
0.8
1
1.2
1.4
Drain-Source Voltage, VSDS (V)
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
)
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
August 1998
5
Rev 1.000
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