ST7MC1/ST7MC2
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,
BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI
PRODUCT PREVIEW
s
s
s
s
s
Memories
– 8K to 60K dual voltage FLASH Program mem-
ory or ROM with read-out protection capabili-
ty. In-Application Programming and In-Circuit
Programming.
– 384 to 1.5K RAM
– HDFlash endurance: 100 cycles, data reten-
tion: 20 years
Clock, Reset And Supply Management
– Enhanced reset system
– Enhanced low voltage supervisor (LVD) for
main supply and auxiliary voltage detector
(AVD) with interrupt capability
– Clock sources: crystal/ceramic resonator os-
cillators and by-pass for external clock, clock
security system.
– Four power saving modes: Halt, Active-Halt,
Wait and Slow
Interrupt Management
– Nested interrupt controller
– 14 interrupt vectors plus TRAP and RESET
– MCES top level interrupt pin
– 16 external interrupt lines (on 3 vectors)
Up to 60 I/O Ports
– up to 60 multifunctional bidirectional I/O lines
– up to 41 alternate function lines
– up to 11 high sink outputs
5 Timers
– Main Clock Controller with: Real time base,
Beep and Clock-out capabilities
– Configurable window watchdog timer
– Two 16-bit timers with: 2 input captures, 2 out-
put compares, external clock input, PWM and
pulse generator modes
– 8-bit PWM Auto-Reload timer with: 2 input
captures, 4 PWM outputs, output compare
and time base interrupt, external clock with
event detector
TQFP80
14 x 14
TQFP64
14 x 14
TQFP44
10 x 10
TQFP32
7x7
s
SDIP56
SDIP32
s
s
s
s
s
2 Communication Interfaces
– SPI synchronous serial interface
–
LIN
SCI asynchronous serial interface
Brushless Motor Control Peripheral
– 6 high sink PWM output channels for sine-
wave or trapezoidal inverter control
– Motor safety including asynchronous emer-
gency stop and write-once registers
– 4 analog inputs for rotor position detection
(sensorless/hall/tacho/encoder)
– Permanent magnet motor coprocessor includ-
ing multiplier, programmable filters, blanking
windows and event counters
– Operational amplifier and comparator for cur-
rent/voltage mode regulation and limitation
Analog peripheral
– 10-bit ADC with 16 input pins
In-circuit Debug
Instruction Set
– 8-bit Data Manipulation
– 63 Basic Instructions
– 17 main Addressing Modes
– 8 x 8 Unsigned Multiply Instruction
– True Bit Manipulation
Development Tools
– Full hardware/software development package
ST7MC2
Device Summary
Features
Program memory - bytes
RAM (stack) - bytes
Peripherals
Operating
Supply vs. Frequency
Temperature Range
Package
-40°C to +85°C
/ -40°C to +125°C
SDIP32/TQFP32
TQFP44
ST7MC1
8K
384 (256)
16K
24K
32K
48K
768 (256)
1024 (256)
1024 (256)
1536 (256)
Watchdog, 16-bit Timer A, LINSCI
, 10-bit ADC, MTC, 8-bit PWM ART, ICD
SPI, 16-bit Timer B
4.5 to 5.5V with f
CPU
≤8MHz
-40°C to +85 °C
SDIP56/TQFP64
TQFP64
60K
1536 (256)
-
TQFP80
Rev. 2.1
April 2004
This is preliminary information on a new product now in development. Details are subject to change without notice.
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1
Table of Contents
1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 REGISTER & MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4 FLASH PROGRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2
4.3
4.4
4.5
4.6
4.7
4.8
MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STRUCTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ICC INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
ICP (IN-CIRCUIT PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
IAP (IN-APPLICATION PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
RELATED DOCUMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5 SUPPLY, RESET AND CLOCK MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 OSCILLATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2
5.3
5.4
RESET SEQUENCE MANAGER (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SYSTEM INTEGRITY MANAGEMENT (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK AND BEEPER (MCC/RTC) . 32
6 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.2
6.3
6.4
6.5
6.6
6.7
MASKING AND PROCESSING FLOW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
INTERRUPTS AND LOW POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
CONCURRENT & NESTED MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
INTERRUPT REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
EXTERNAL INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
EXTERNAL INTERRUPT CONTROL REGISTER (EICR) . . . . . . . . . . . . . . . . . . . . . . . 43
7 POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.2
7.3
7.4
SLOW MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
WAIT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
ACTIVE-HALT AND HALT MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
8 I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
8.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
8.2
8.3
8.4
8.5
FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
I/O PORT IMPLEMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
LOW POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
9 ON-CHIP PERIPHERALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
9.1 WINDOW WATCHDOG (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
9.2
9.3
9.4
9.5
PWM AUTO-RELOAD TIMER (ART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
16-BIT TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
294
SERIAL PERIPHERAL INTERFACE (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
LINSCI SERIAL COMMUNICATION INTERFACE (LIN MASTER/SLAVE) . . . . . . . . . 103
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Table of Contents
9.6
9.7
9.8
MOTOR CONTROLLER (MTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
OPERATIONAL AMPLIFIER (OA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
10-BIT A/D CONVERTER (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
10 INSTRUCTION SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
10.1 CPU ADDRESSING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
10.2 INSTRUCTION GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
11 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
11.1 PARAMETER CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
11.2 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
11.3 6OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
11.4 SUPPLY CURRENT CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
11.5 CLOCK AND TIMING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
11.6 MEMORY CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
11.7 EMC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
11.8 I/O PORT PIN CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
11.9 CONTROL PIN CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263
11.10 TIMER PERIPHERAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265
11.11 COMMUNICATION INTERFACE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . 266
11.12 MOTOR CONTROL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268
11.13 OPERATIONAL AMPLIFIER CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
11.14 10-BIT ADC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
12 PACKAGE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
12.1 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
12.2 THERMAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282
12.3 SOLDERING AND GLUEABILITY INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283
13 ST7MC DEVICE CONFIGURATION AND ORDERING INFORMATION . . . . . . . . . . . . . . . . 284
13.1 FLASH OPTION BYTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284
13.2 DEVICE ORDERING INFORMATION AND TRANSFER OF CUSTOMER CODE . . . . 286
13.3 DEVELOPMENT TOOLS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 288
13.4 ST7 APPLICATION NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
14 SUMMARY OF CHANGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
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ST7MC1/ST7MC2
1 INTRODUCTION
The ST7MCx device is member of the ST7 micro-
controller family designed for mid-range applica-
tions with a Motor Control dedicated peripheral.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set and are available with FLASH, ROM or
FASTROM program memory.
Under software control, all devices can be placed
in WAIT, SLOW, ACTIVE-HALT or HALT mode,
reducing power consumption when the application
is in idle or stand-by state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
The devices feature an on-chip Debug Module
(DM) to support in-circuit debugging (ICD). For a
description of the DM registers, refer to the ST7
ICC Protocol Reference Manual.
Figure 1. Device Block Diagram
8-BIT CORE
ALU
RESET
V
PP
V
SS
V
DD
CONTROL
PROGRAM
MEMORY
(8K - 60K Bytes)
RAM
(384 - 1536Bytes)
PORT H
1)
PH7:0
1)
(8-bits)
PG7:0
1)
(8-bits)
LVD
AVD
OSC1
OSC2
OSC
ADDRESS AND DATA BUS
SCI/LIN
PORT G
1)
WATCHDOG
PWM ART
PORT A
PORT D
PD7:0
(8-bits)
TIMER A
10-BIT ADC
V
AREF
V
SSA
PORT E
1
PE5:0
(6-bits)
TIMER B
1
PA7:0
1)
(8-bits)
PORT B
MTC VOLT INPUT
SPI
1
PB7:0
(8-bits)
PORT C
PORT F
1
PF5:0
(6-bits)
MCC/RTC/BEEP
1
PC7:0
(8-bits)
MOTOR CONTROL
MCES
DEBUG MODULE
On some devices only, see Table 1, “ST7MC Device Pin Description,” on page 11
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1
ST7MC1/ST7MC2
2 PIN DESCRIPTION
Figure 2. 80-Pin TQFP 14x14 Package Pinout
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
MCO2 (HS)
MCO1 (HS)
MCO0 (HS)
VPP/ICCSEL
PE5
PE4 / EXTCLK_B
PE3 / ICAP1_B
PE2 / ICAP2_B
PE1 / OCMP1_B
PE0 (HS) / OCMP2_B
PH7
PH6
PH5
PH4
VDD_2
VSS_2
PD7 (HS) / TDO
PD6 (HS) / RDI
PD5 / AIN15 / ICCDATA
PD4 /EXTCLK_A / AIN14 / ICCCLK
(HS) MCO3
(HS) MCO4
(HS) MCO5
MCES
PG0
PG1
PG2
PG3
OSC1
OSC2
VSS_1
VDD_1
PWM3 / PA0
PWM2 / (HS) PA1
PWM1 / PA2
AIN0 / PWM0 / PA3
ARTCLK / (HS) PA4
AIN1 / ARTIC1 / PA5
ARTIC2 / PA6
AIN2 / PA7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
ei0
ei1
ei1
ei2
ei2
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
PD3 / ICAP1_A / AIN13
PD2 / ICAP2_A / AIN12
PD1 (HS) / OCMP1_A
PD0 / OCMP2_A / AIN11
PH3
PH2
PH1
PH0
PF5 (HS)
PF4 (HS)
PF3 (HS) / BEEP
PF2 / MCO / AIN10
PF1 / MCZEM / AIN9
PF0 / MCDEM / AIN8
RESET
V
DD_0
VSS_0
VSSA
VAREF
PC7 / MCPWMW / AIN7
MCVREF / PB0
MCIA / PB1
MCIB / PB2
MCIC / PB3
MISO / PB4
AIN3 / MOSI / PB5
SCK / (HS) PB6
AIN4 /SS /(HS) PB7
PG4
PG5
PG6
PG7
(HS) PC0
AIN5 / MCCFI 0/ PC1
OAP / PC2
OAN / PC3
AIN6 / MCCFI 1/ OAZ
* MCCREF / PC4
(HS) 20mA high sink capability
eix associated external interrupt vector
* Once the MTC peripheral is ON, the pin PC4 is configured to an alternate function. PC4 is no longer usable as a digital I/O
MCPWMU/ PC5
MCPWMV/ PC6
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
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Programming Basics
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