The P1707A is targeted towards notebook LCD displays,
and other displays using an LVDS interface, PC peripheral
devices, and embedded systems.
Product Description
The P1707A is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies.
The P1707A reduces electromagnetic interference (EMI) at
Block Diagram
VDD
SR0 SR1 SSON/SBM
PLL
Modulation
CLKIN
Frequency
Divider
Feedback
Divider
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575 Augustine Drive
•
Santa Clara, CA
•
Tel: 408.855.4900
•
Fax: 408.855.4999
•
www.alsc.com
Notice: The information in this document is subject to change without notice.
May 2006
rev 1.2
Pin Configuration
CLKIN
1
8
7
6
5
P1707A
NC
SR0
SR1
SSON/SBM
VDD
2
VSS
3
P1707A
ModOUT
4
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
CLKIN
VDD
VSS
ModOUT
SSON/SBM
SR1
SR0
NC
Type
I
P
P
O
I
I
I
-
Description
Connect to externally generated clock signal. To put the part into standby mode,
disable the input clock signal to this pin and pull SSON/SBM (pin 5) low.
Refer
Standby Mode Selection Table.
Connect to +3.3V. (Place a decoupling 0.1µF close to pin and ground)
Ground Connection. Connect to system ground.
Spread spectrum clock output.
Spread Spectrum On/Off and standby mode control.
Refer Standby Mode
Selection Table.
This pin has an internal pull-up resistor.
Digital logic input used to select Spreading Range.
Refer Spread Spectrum
Selection Table.
This pin has an internal pull-up resistor.
Digital logic input used to select Spreading Range.
Refer Spread Spectrum
Selection Table.
This pin has an internal pull-up resistor.
No connect.
Standby Mode Selection
CLKIN
Disabled
Disabled
Enabled
Enabled
SSON/SBM
0
1
0
1
Spread
Spectrum
N/A
N/A
Off
On
ModOUT
Disabled
Disabled
Reference
Normal
PLL
Disabled
Free Running
Disabled
Normal
Mode
Standby
Free Running
Buffer out
Normal
Spread Range Selection
SR1
0
0
1
1
SR0
0
1
0
1
Spreading Range
± 1.50%
± 2.50%
± 0.50%
± 1.00%
Modulation Rate
(F
IN
/80) * 34.72 KHz
(F
IN
/80) * 34.72 KHz
(F
IN
/80) * 34.72 KHz
(F
IN
/80) * 34.72 KHz
Notebook LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 7
May 2006
rev 1.2
Absolute Maximum Ratings
Symbol
VDD, V
IN
T
STG
T
A
T
s
T
J
T
DV
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
P1707A
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +7.0
-65 to +125
-40 to +85
260
150
2
Unit
V
°C
°C
°C
°C
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
CC
I
DD
VDD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
(pull-up resistors on inputs SR0, SR1 and SSON/SBM)
Input high current
X
OUT
output low current ( V
XOL
@ 0.4V, VDD = 3.3V)
X
OUT
output high current ( V
XOH
@ 2.5V, VDD = 3.3V)
Output low voltage VDD= 3.3V, I
OL
= 20mA
Output high voltage VDD = 3.3V, I
OH
= 20mA
Dynamic supply current normal mode
3.3V and 10pF loading
Static supply current standby mode
Operating voltage
Power up time (first locked clock cycle after power up)
Clock output impedance
Parameter
Min
VSS – 0.3
2.0
-
-
-
-
-
2.5
8.46
-
2.7
-
-
Typ
-
-
-
-
3
3
-
-
12
0.6
3.3
0.18
20
Max
0.8
VDD+ 0.3
-35
35
-
-
0.4
-
17.78
-
3.7
-
-
Unit
V
V
µA
µA
mA
mA
V
V
mA
mA
V
mS
Ω
AC Electrical Characteristics
Symbol
f
IN
f
OUT
t
LH
*
t
HL
*
t
JC
t
D
Input frequency
Output frequency
Output rise time ( Measured from 0.8V to 2.0V )
Output fall time ( Measured from 2.0V to 0.8V )
Jitter (Cycle to cycle)
Output duty cycle
Parameter
Min
60
60
0.7
0.6
-
45
Typ
-
-
0.9
0.8
-
50
Max
175
175
1.1
1.0
360
55
Unit
MHz
MHz
nS
nS
pS
%
*t
LH
and t
HL
are measured into a capacitive load of 15pF
Notebook LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
3 of 7
May 2006
rev 1.2
Package Information
P1707A
Mechanical Package Outline 8-Pin SOIC Package
E
H
D
A2
A
θ
e
B
A
1
C
L
D
Dimensions
Symbol
Min
A1
A
A2
B
C
D
E
e
H
L
θ
Inches
Max
0.010
0.069
0.059
0.020
0.010
0.004
0.053
0.049
0.012
0.007
Millimeters
Min
0.10
1.35
1.25
0.31
0.18
4.90 BSC
3.91 BSC
1.27 BSC
6.00 BSC
0.41
0°
1.27
8°
Max
0.25
1.75
1.50
0.51
0.25
0.193 BSC
0.154 BSC
0.050 BSC
0.236 BSC
0.016
0°
0.050
8°
Note: Controlling dimensions are millimeters
SOIC – 0.074 grams unit weight
Notebook LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
4 of 7
May 2006
rev 1.2
P1707A
Mechanical Package Outline 8-Pin TSSOP
H
E
D
A2
A
θ
e
B
A1
L
C
Dimensions
Symbol
Min
A
A1
A2
B
c
D
E
e
H
L
θ
0.020
0°
0.002
0.033
0.008
0.004
0.114
0.169
0.026 BSC
0.252 BSC
0.028
8°
0.50
0°
Inches
Max
0.043
0.006
0.037
0.012
0.008
0.122
0.177
0.05
0.85
0.19
0.09
2.90
4.30
Millimeters
Min
Max
1.10
0.15
0.95
0.30
0.20
3.10
4.50
0.65 BSC
6.40 BSC
0.70
8°
Note: Controlling dimensions are millimeters
TSSOP – 0.034 grams unit weight
Notebook LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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