1. Figure 23 provides thermal resistance versus pc board pad size.
ELECTRICAL CHARACTERISTICS
(VI–VO = 5.0 V; IO = 0.1 A, TJ = Tlow to Thigh [Note 1], unless otherwise noted.)
Characteristics
Line Regulation (Note 2)
TA = 25°C, 3.0 V
≤
VI–VO
≤
40 V
Load Regulation (Note 2)
TA = 25°C, 10 mA
≤
IO
≤
0.5 A
VO
≤
5.0 V
VO
≥
5.0 V
Adjustment Pin Current
Adjustment Pin Current Change
2.5 V
≤
VI–VO
≤
40 V, 10 mA
≤
IL
≤
0.5 A, PD
≤
Pmax
Reference Voltage
3.0 V
≤
VI–VO
≤
40 V, 10 mA
≤
IO
≤
0.5 A, PD
≤
Pmax
Line Regulation (Note 2)
3.0 V
≤
VI–VO
≤
40 V
Load Regulation (Note 2)
10 mA
≤
IO
≤
0.5 A
VO
≤
5.0 V
VO
≥
5.0 V
Temperature Stability (Tlow
≤
TJ
≤
Thigh)
Minimum Load Current to Maintain Regulation
(VI–VO = 40 V)
Maximum Output Current
VI–VO
≤
15 V, PD
≤
Pmax
VI–VO = 40 V, PD
≤
Pmax, TA = 25°C
RMS Noise, % of VO
TA= 25°C, 10 Hz
≤
f
≤
10 kHz
Ripple Rejection, VO = 10 V, f = 120 Hz (Note 3)
Without CAdj
CAdj = 10
µF
Long–Term Stability, TJ = Thigh (Note 4)
TA= 25°C for Endpoint Measurements
LM317M:
LM317MA:
Figure
1
2
Symbol
Regline
Regload
–
–
3
1,2
3
1
2
IAdj
∆I
Adj
Vref
Regline
Regload
–
–
3
3
3
TS
ILmin
Imax
0.5
0.15
–
4
N
RR
–
66
3
S
–
65
80
0.3
–
–
1.0
%/1.0 k
Hrs.
–
0.9
0.25
0.003
–
–
–
% VO
dB
–
–
20
0.3
0.7
3.5
70
1.5
–
10
mV
% VO
% VO
mA
A
–
–
1.200
1.225
–
5.0
0.1
50
0.2
1.250
1.250
0.02
25
0.5
100
5.0
1.300
1.275
0.07
mV
% VO
µA
µA
V
%/V
Min
–
Typ
0.01
Max
0.04
Unit
%/V
NOTES:
1. Tlow to Thigh = 0° to +125°C for LM317M
Tlow to Thigh = – 40° to +125°C for LM317MB
2. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately.
Pulse testing with low duty cycle is used.
3. CAdj, when used, is connected between the adjustment pin and ground.
4. Since Long–Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability
from lot to lot.
2
MOTOROLA ANALOG IC DEVICE DATA
LM317M, LM317MA
Representative Schematic Diagram
Vin
300
300
300
3.0k
300
70
6.8V
6.8V
350
18k
8.67k
130
5.1k
200k
500
400
6.3V
180
180
2.0k
6.0k
10
pF 10
pF
60
1.25
Vout
2.4k
12.8k
50
Adjust
Figure 1. Line Regulation and
∆I
Adj/Line Test Circuit
VCC
Line Regulation (%/V) =
*
VIH
VIL
Vin
Vout
LM317M
VOH – VOL
x 100
VOL
VOH
VOL
Adjust
Cin
0.1µF
IAdj
R1
240
1%
CO
RL
+
1.0µF
* Pulse Testing Required:
1% Duty Cycle is suggested.
R2
1%
MOTOROLA ANALOG IC DEVICE DATA
3
LM317M, LM317MA
Figure 2. Load Regulation and
∆I
Adj
/Load
Test Circuit
Load Regulation (mV) = VO (min Load) –VO (max Load)
Load Regulation (% VO) =
Vin
Vin
Vout
VO (min Load) – VO (max Load)
VO (min Load)
X 100
VO (min Load)
VO (max Load)
LM317M
IL
RL
(max Load)
*
+
CO
1.0µF
Adjust
Cin
0.1µF
IAdj
R1
240
1%
RL
(min Load)
R2
1%
* Pulse Testing Required:
1% Duty Cycle is suggested.
Figure 3. Standard Test Circuit
Vin
Vout
LM317M
IL
Adjust
VI
Cin
0.1µF
ISET
R2
1%
R1
IAdj
240
1%
Vref
+
CO
1µF
RL
VO
*Pulse Testing Required:
1% Duty Cycle is suggested.
To Calculate R2:
Vout = ISET R2 + 1.250 V
Assume ISET = 5.25 mA
Figure 4. Ripple Rejection Test Circuit
24V
14V
f = 120 Hz
Vin
LM317M
Vout
Vout = 10 V
Adjust
Cin
0.1µF
R1
240
1%
D1 *
1N4002
+
CO
1.0µF
RL
VO
R2
1.65K
1%
**
CAdj
+
10µF
* D1 Discharges CAdj if Output is Shorted to Ground.
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Embedded System
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