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82091AA

Description
ADVANCED INTEGRATED PERIPHERAL (AIP)
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size1MB,195 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
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82091AA Overview

ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA Parametric

Parameter NameAttribute value
MakerIntel
Parts packaging codeQFP
package instructionQFP,
Contacts100
Reach Compliance Codeunknown
Address bus width11
boundary scanNO
Bus compatibilityEISA; ISA; PCI; PC-AT; PS/2
maximum clock frequency24 MHz
External data bus width8
JESD-30 codeR-PQFP-G100
length20 mm
Number of I/O lines8
Number of terminals100
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Package shapeRECTANGULAR
Package formFLATPACK
Certification statusNot Qualified
Maximum seat height3.15 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
width14 mm
Base Number Matches1
82091AA
ADVANCED INTEGRATED PERIPHERAL (AIP)
Y
Single-Chip PC Compatible I O Solution
for Notebook and Desktop Platforms
82078 Floppy Disk Controller Core
Two 16550 Compatible UARTs
One Multi-Function Parallel Port
IDE Interface
Integrated Back Power Protection
Integrated Game Port Chip Select
5V or 3 3V Supply Operation with 5V
Tolerant Drive Interface
Full Power Management Support
Supports Type F DMA Transfers for
Faster I O Performance
No Wait-State Host I O Interface
Programmable Interrupt Interfaces
Single Crystal Oscillator Clock
(24 MHz)
Software Detectable Device ID
Comprehensive Powerup
Configuration
The 82091AA is 100 Percent
Compatible with EISA ISA and AT
Host Interface Features
8-Bit Zero Wait-State ISA Bus
Interface
DMA with Type F Transfers
Five Programmable ISA Interrupt
Lines
Internal Address Decoder
Parallel Port Features
All IEEE Standard 1284 Protocols
Supported (Compatibility Nibble
Byte EPP and ECP)
Peak Bi-Directional Transfer Rate of
2 MB sec
Provides Interface for Low-Cost
Engineless Laser Printer
16-Byte FIFO for ECP
Interface Backpower Protection
Y
Floppy Disk Controller Features
100 Percent Software Compatible
with Industry Standard 82077SL and
82078
Integrated Analog Data Separator
250K 300K 500K and 1 MBits sec
Programmable Powerdown
Command
Auto Powerdown and Wakeup
Modes
Integrated Tape Drive Support
Perpendicular Recording Support for
4 MB Drives
Programmable Write Pre-
Compensation Delays
256 Track Direct Address Unlimited
Track Support
16-Byte FIFO
Supports 2 or 4 Drives
16550 Compatible UART Features
Two Independent Serial Ports
Software Compatible with 8250 and
16450 UARTs
16-Byte FIFO per Serial Port
Two UART Clock Sources Supports
MIDI Baud Rate
IDE Interface Features
Generates Chip Selects for IDE
Drives
Integrated Buffer Control Logic
Dual IDE Interface Support
Power Management Features
Transparent to Operating Systems
and Applications Programs
Independent Power Control for Each
Integrated Device
100-Pin QFP Package
(See Packaging Spec 240800)
Y
Y
Y
Y
Y
Y
Y
The 82091AA Advanced Integrated Peripheral (AIP) is an integrated I O solution containing a floppy disk
controller 2 serial ports a multi-function parallel port an IDE interface and a game port on a single chip The
integration of these I O devices results in a minimization of form factor cost and power consumption The
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT
INTEL CORPORATION 1996
December 1995
Order Number 290486-003

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