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ZXM41N10F

Description
Small Signal Field-Effect Transistor, 0.17A I(D), 100V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOT-23, 3 PIN
CategoryDiscrete semiconductor    The transistor   
File Size92KB,2 Pages
ManufacturerZetex Semiconductors
Websitehttp://www.zetex.com/
Environmental Compliance
Download Datasheet Parametric View All

ZXM41N10F Overview

Small Signal Field-Effect Transistor, 0.17A I(D), 100V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOT-23, 3 PIN

ZXM41N10F Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instructionSMALL OUTLINE, R-PDSO-G3
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresLOW THRESHOLD
Minimum drain-source breakdown voltage100 V
Maximum drain current (ID)0.17 A
Maximum drain-source on-resistance12 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)4 pF
JESD-30 codeR-PDSO-G3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeN-CHANNEL
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature40
Transistor component materialsSILICON
Base Number Matches1
ZXM41N10F
SOT23 N-CHANNEL ENHANCEMENT MODE VERTICAL D MOSFET
FEATURES
BV
DSS
= 100V
Low Threshold
DEVICE MARKING
410
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Drain-source voltage
Drain-gate voltage
Continuous drain current at T
amb
=25°C
Pulsed drain current
Gate-source voltage
Power dissipation at T
amb
=25°C
Operating and storage temperature range
PINOUT TOP VIEW
SYMBOL
V
DS
V
DGR
I
D
I
DM
V
GS
P
tot
T
j
:T
stg
VALUE
100
100
170
680
± 20
360
-55 to +150
SOT23
UNIT
V
V
mA
mA
V
mW
°C
ELECTRICAL CHARACTERISTICS
(at T
amb
= 25°C unless otherwise stated)
PARAMETER
Drain-source breakdown voltage
Gate-source threshold voltage
Gate-body leakage
Zero gate voltage drain current
Static drain-source on-state
resistance
(1)
Forward transconductance
Input capacitance
(2)
Common source output
capacitance
(2)
Reverse transfer capacitance
(2)
Turn-on delay time
Rise time
(2)(3)
Turn-off delay time
Fall time
(2)(3)
(2)(3)
(2)(3)
(1)(2)
SYMBOL MIN.
BV
DSS
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
80
100
0.5
TYP.
MAX.
UNIT CONDITIONS
V
I
D
=0.25mA, V
GS
=0V
I =1mA, V
DS
= V
GS
D
V
GS
=±20V, V
DS
=0V
V
DS
=100V, V
GS
=0V
V
GS
=4.5V, I
D
=150mA
V
GS
=3V, I
D
=50mA
mS
V
DS
=25V, I
D
=100mA
1.5
50
500
8
12
V
nA
nA
25
9
4
10
10
15
25
pF
pF
pF
ns
ns
ns
ns
V
DD
≈30V,
I
D
=280mA
V
DS
=25V, V
GS
=0V, f=1MHz
NOTES:
(1)
Measured under pulsed conditions. Width=300µs. Duty cycle 2% (2) Sample test.
(3)
Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
ISSUE
2
-
OCTOBER 2006
1
SEMICONDUCTORS

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