LPR520PC15 datasheet, PDF - EEWORLD Datasheet

LPR520PC15: DescriptionPipeline Register, 16-Bit, CMOS, PDIP40, 0.600 INCH, PLASTIC, DIP-40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size236KB，5 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LPR520PC15 Overview

Pipeline Register, 16-Bit, CMOS, PDIP40, 0.600 INCH, PLASTIC, DIP-40

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP, DIP40,.6
Contacts	40
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Other features	MULTIPLEXED OUTPUT; ICC SPECIFIED @ 5MHZ
boundary scan	NO
maximum clock frequency	66.66 MHz
External data bus width	16
JESD-30 code	R-PDIP-T40
JESD-609 code	e0
length	52.197 mm
low power mode	NO
Humidity sensitivity level	3
Number of terminals	40
Maximum operating temperature	70 °C
Minimum operating temperature
Output data bus width	16
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum slew rate	40 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, PIPELINE REGISTER
Base Number Matches	1

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