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MC74VHC00DT

Description
NAND Gate, AHC/VHC Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14
Categorylogic    logic   
File Size84KB,8 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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MC74VHC00DT Overview

NAND Gate, AHC/VHC Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14

MC74VHC00DT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionTSSOP, TSSOP14,.25
Reach Compliance Codeunknown
seriesAHC/VHC
JESD-30 codeR-PDSO-G14
JESD-609 codee0
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.008 A
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply2/5.5 V
Prop。Delay @ Nom-Sup8.5 ns
propagation delay (tpd)13 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width4.4 mm
Base Number Matches1
MC74VHC00
Quad 2−Input NAND Gate
The MC74VHC00 is an advanced high speed CMOS 2-input
NAND gate fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
http://onsemi.com
MARKING DIAGRAMS
14
High Speed: t
PD
= 3.7 ns (Typ) at V
CC
= 5 V
Low Power Dissipation: I
CC
= 2
mA
(Max) at T
A
= 25°C
High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 32 FETs or 8 Equivalent Gates
SO - 14
D SUFFIX
CASE 751A - 03
VHC00
AWLYWW
1
14
TSSOP - 14
DT SUFFIX
CASE 948G - 01
VHC00
AWLYWW
V
CC
14
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
1
14
EIAJ SO - 14
M SUFFIX
CASE 965 - 01
1
A1
2
B1
3
Y1
4
A2
5
B2
6
Y2
7
GND
A
L, WL
Y
W, WW
1
VHC00
ALYW
Figure 1. Pinout: 14 - Lead Packages
(Top View)
= Assembly Location
= Wafer Lot
= Year
= Work Week
FUNCTION TABLE
Inputs
A
L
L
H
H
B
L
H
L
H
Output
Y
H
H
H
L
ORDERING INFORMATION
Device
MC74VHC00DR2
MC74VHC00DT
MC74VHC00DTR2
MC74VHC00MEL
Package
SO-14
TSSOP-14
Shipping
2500 Tape & Reel
96 Units/Rail
TSSOP-14 2500 Tape & Reel
EIAJ
SO-14
2000 Tape & Reel
©
Semiconductor Components Industries, LLC, 2003
1
July, 2003 - Rev. 4
Publication Order Number:
MC74VHC00/D

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