SSB3FP611115

ZTE The communication embargo incident has impacted the communication industry and sounded the alarm for the semiconductor industry. Let's follow the embedded editor to learn more about the r...[Details]

For STM32, there are two ways to reset the software:   1) Use the official software library     The system reset function is directly provided in the stm32f10x_nvic.c file of the official software li...[Details]

This part of the code in the void SystemClock_Config(void) function in the main file generated by stm32cubemx RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; This bug occurs, and the f...[Details]

The last two blogs talked about a version problem of STM32CubeMX and the problem of hardware reset. When you solve these two problems, you will find that after the program is burned into the board, t...[Details]

Automotive LCD Instrument Clock EMI Solution As early as 2014, the market size of China's automotive full LCD instrument has reached 3.506 billion yuan, and it is expected that by 2020, this s...[Details]

In the development of artificial intelligence, talent reserve is undoubtedly an important part. Artificial intelligence should be a bottom-level technology that can be deeply embedded in any indust...[Details]

Analysts have sorted out some interesting phenomena. Let's follow the embedded editor to learn about the relevant content. Huawei emerged as a star in the all- flash array sales ra...[Details]

The day before yesterday, another mainland technology company submitted a prospectus to the Hong Kong Stock Exchange. The company is called "Jia Nan Creative (hereinafter referred to as 'Jia Nan')"...[Details]

1) Independent watchdog has no interrupt, window watchdog has interrupt   2) Independent watchdogs can be divided into hardware and software, while window watchdogs can only be controlled by software...[Details]

1. Function and purpose         There are two pins BOOT0 and BOOT1 on each STM32 chip. The level status of these two pins when the chip is reset determines which area the program starts from after th...[Details]

#include reg52.h #define PORTLEN P0 sbit bit_select = P2^0; sbit seg_select = P2^1; unsigned char src = {0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f ,0x6f,0x77,0x7c,0x39,0x5e,0x79,0x71}; unsigne...[Details]

T1 or T2 are two timers/counters of MCS-51 microcontroller. The first method can use two timers/counters to generate rectangular waves. In order to save interface resources, the second method is used...[Details]

****************************************************************** 1. The operand is in register, R0--R7 2. Operands are in internal RAM 3. Operands are in external RAM But they are all similar. For ...[Details]

One addend is in the on-chip RAM 40H, 41H, 42H units, the other addend is in the on-chip RAM 43H, 44H, 45H, and the sum is stored in the 50H, 51H, 52H units, with the carry bit stored in 00H. Please ...[Details]

The following comes from - "cortex-M3 Definitive Guide" Special function register group: Program Status Registers (PSRs or xPSRs) Interrupt mask register group (PRIMASK, FAULTMASK, and BASEPRI) ...[Details]