To our customers,
Old Company Name in Catalogs and Other Documents
On April 1
st
, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas
Electronics Corporation
took over all the business of both
companies.
Therefore, although the old company name remains in this document, it is a valid
Renesas
Electronics document. We appreciate your understanding.
Renesas Electronics website:
http://www.renesas.com
April 1
st
, 2010
Renesas Electronics Corporation
Issued by:
Renesas Electronics Corporation
(http://www.renesas.com)
Send any inquiries to
http://www.renesas.com/inquiry.
Notice
1.
All information included in this document is current as of the date this document is issued. Such information, however, is
subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please
confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to
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“Standard”:
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-
owned subsidiaries.
(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
3851 Group
(Built-in 24 KB or more ROM)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0066-0101Z
Rev.1.01
Oct 15, 2003
DESCRIPTION
The 3851 group (built-in 24 KB or more ROM) is the 8-bit micro-
computer based on the 740 family core technology.
The 3851 group (built-in 24 KB or more ROM) is designed for the
household products and office automation equipment and includes
serial I/O functions, 8-bit timer, I
2
C-BUS interface, and A-D con-
verter.
FEATURES
Basic machine-language instructions ..................................... 71
Minimum instruction execution time ................................. 0.5
µs
(at 8 MHz oscillation frequency)
Memory size
ROM ................................................................ 24K to 32K bytes
RAM .................................................................... 640 to 1K bytes
Programmable input/output ports ........................................... 34
Interrupts ................................................ 17 sources, 16 vectors
Timers ............................................................................ 8-bit X 4
Serial I/O1 .................... 8-bit X 1(UART or Clock-synchronized)
Serial I/O2 ................................... 8-bit X 1(Clock-synchronized)
Multi-master I
2
C-BUS interface .................................. 1 channel
PWM .............................................................................. 8-bit X 1
A-D converter ............................................... 10-bit X 5 channels
Watchdog timer ........................................................... 16-bit X 1
Clock generating circuit ................................... Built-in 2 circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
Power source voltage
In high-speed mode ................................................. 4.0 to 5.5 V
(at 8 MHz oscillation frequency)
In middle-speed mode ............................................. 2.7 to 5.5 V
(at 8 MHz oscillation frequency)
In low-speed mode ................................................... 2.7 to 5.5 V
(at 32 kHz oscillation frequency)
Power dissipation
In high-speed mode ......................................................... 34 mW
(at 8 MHz oscillation frequency, at 5 V power source voltage)
In low-speed mode
Except M38517F8FP/SP ................................................. 60
µW
M38517F8FP/SP ............................................................ 450
µW
(at 32 kHz oscillation frequency, at 3 V power source voltage)
Operating temperature range .................................. –20 to 85°C
APPLICATION
Office automation equipment, FA equipment, Household products,
Consumer electronics, etc.
PIN CONFIGURATION (TOP VIEW)
V
CC
V
REF
AV
SS
P4
4
/INT
3
/PWM
P4
3
/INT
2
/S
CMP2
P4
2
/INT
1
P4
1
/INT
0
P4
0
/CNTR
1
P2
7
/CNTR
0
/S
RDY1
P2
6
/S
CLK1
P2
5
/SCL
2
/TxD
P2
4
/SDA
2
/RxD
P2
3
/SCL
1
P2
2
/SDA
1
CNV
SS
P2
1
/X
CIN
P2
0
/X
COUT
RESET
X
IN
X
OUT
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P3
0
/AN
0
P3
1
/AN
1
P3
2
/AN
2
P3
3
/AN
3
P3
4
/AN
4
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
P0
5
P0
6
P0
7
P1
0
/(LED
0
)
P1
1
/(LED
1
)
P1
2
/(LED
2
)
P1
3
/(LED
3
)
P1
4
/(LED
4
)
P1
5
/(LED
5
)
P1
6
/(LED
6
)
P1
7
/(LED
7
)
Package type : FP ........................... 42P2R-A/E (42-pin plastic-molded SSOP)
Package type : SP ........................... 42P4B (42-pin plastic-molded SDIP)
Fig. 1 M38517M8-XXXFP/SP pin configuration
M38517M8-XXXFP/SP
Rev.1.01
Oct 15, 2003
page 1 of 89
FUNCTIONAL BLOCK
Rev.1.01
Reset input
V
SS
V
CC
1
15
18
21
FUNCTIONAL BLOCK DIAGRAM
Main-clock
input
X
IN
RESET
CNV
SS
Main-clock
output
X
OUT
Fig.2 Functional block diagram
3851 Group
(Built-in 24 KB or more ROM)
Oct 15, 2003
C P U
19
20
Sub-clock Sub-clock
input
output
X
CIN
X
COUT
Clock generating circuit
page 2 of 89
ROM
X
Prescaler 12(8)
RAM
Timer 2( 8 )
Timer X( 8 )
Timer Y( 8 )
Y
Prescaler X(8)
A
Timer 1( 8 )
S
PC
H
PS
CNTR
1
PC
L
Prescaler Y(8)
CNTR
0
Watchdog
timer
Reset
A-D
converter
(10)
PWM
(8)
SI/O1(8)
I
2
C
SI/O2(8)
X
COUT
INT
0
–
INT
3
X
CIN
P4(5)
P3(5)
P2(8)
P1(8)
P0(8)
2 3
38 39 40 41 42
4 5 6 7 8
9 10 11 12 13 1416 17
22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37
I/O port P4
I/O port P3
I/O port P2
I/O port P1
I/O port P0
V
REF
AV
SS
3851 Group
(Built-in 24 KB or more ROM)
Table 1 Pin description
Pin
V
CC
, V
SS
CNV
SS
V
REF
AV
SS
RESET
X
IN
X
OUT
Name
Power source
CNV
SS
input
Reference
voltage input
Analog power
source input
Reset input
Clock input
Clock output
Functions
•Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
•This pin controls the operation mode of the chip.
•Normally connected to V
SS
.
•Reference voltage input pin for A-D converter.
•Analog power source input pin for A-D converter.
•Connect to Vss.
•Reset input pin for active “L”.
•Input and output pins for the clock generating circuit.
•Connect a ceramic resonator or quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
•When an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•CMOS 3-state output structure.
•P1
0
to P1
7
(8 bits) are enabled to output large current
for LED drive.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•P2
2
to P2
5
can be switched between CMOS compatible
input level or SMBUS input level in the I
2
C-BUS inter-
face function.
•P2
0
, P2
1
, P2
4
to P2
7
: CMOS3-state output structure.
•P2
4
, P2
5
: N-channel open-drain structure in the I
2
C-
BUS interface function.
•P2
2
, P2
3
: N-channel open-drain structure.
P3
0
/AN
0
–
P3
4
/AN
4
P4
0
/CNTR
1
P4
1
/INT
0
P4
2
/INT
1
P4
3
/INT
2
/S
CMP2
P4
4
/INT
3
/PWM
I/O port P3
•8-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
I/O port P4
•8-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
• Interrupt input pin
• S
CMP2
output pin
• Interrupt input pin
• PWM output pin
• Timer Y function pin
• Interrupt input pins
• A-D converter input pin
• I
2
C-BUS interface function pin/
Serial I/O1 function pins
• Serial I/O1 function pin
• Serial I/O1 function pin/Timer X
function pin
• Sub-clock generating circuit I/O
pins (connect a resonator)
• I
2
C-BUS interface function pins
• Serial I/O2 function pin
Function except a port function
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
–P0
7
P1
0
–P1
7
P2
0
/X
COUT
P2
1
/X
CIN
P2
2
/SDA
1
P2
3
/SCL
1
P2
4
/SDA
2
/RxD
P2
5
/SCL
2
/TxD
P2
6
/S
CLK1
P2
7
/CNTR
0
/
S
RDY1
I/O port P0
I/O port P1
I/O port P2
Rev.1.01
Oct 15, 2003
page 3 of 89
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