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DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD16724
480-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 256-GRAY SCALE)
DESCRIPTION
The
µ
PD16724 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scale. Data input is
based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216
colors by output of 256 values
γ
-corrected by an internal D/A converter and 9-by-2 external power modules.
Because the output dynamic range is as large as V
SS2
+ 0.2 V to V
DD2
−
0.2 V, level inversion operation of the LCD’s
common electrode is rendered unnecessary. It corresponds to the 2 x 2-dot inversion drive at the time of single-
sided mounting. The maximum clock frequency is 55 MHz when driving at 3.0 V.
FEATURES
•
CMOS level input
•
480 outputs
•
Input of 8 bits (gray scale data) by 6 dots
•
Capable of outputting 256 values by means of 9-by-2 external power modules (18 units) and a D/A converter
5
•
Logic power supply voltage (V
DD1
): 2.3 to 3.6 V
•
Driver power supply voltage (V
DD2
): 12.0 to 15.0 V (switchable: LPC)
•
Output dynamic range: V
SS2
+ 0.2 V to V
DD2
−
0.2 V
•
High-speed data transfer: f
CLK
= 55 MHz MAX. (internal data transfer speed when operating at V
DD1
= 3.0 V)
•
Apply for 2 x 2 dot-line inversion
•
Output voltage polarity inversion function (POL)
•
Input data inversion function (POL21, POL22)
•
Output reset control (MODE1)
•
Slew rate control mode switching (MODE2)
•
Slew rate control (SRC1, SRC2)
•
Bias current control (LPC)
ORDERING INFORMATION
Part Number
Package
TCP (TAB package)
µ
PD16724N-xxx
Remark
The TCP’s external shape is customized. To order the required shape, so please contact one of our sales
representatives.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S16086EJ1V0DS00 (1st edition)
Date Published March 2003 NS CP (K)
Printed in Japan
The mark
5
shows major revised points.
2002
DSP and ARM Processors
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