24AA01/24LC01B
1K I
2
C
™
Serial EEPROM
Device Selection Table
Part
Number
24AA01
24LC01B
Note 1:
V
CC
Range
1.7-5.5
2.5-5.5
Max. Clock
Frequency
400 kHz
(1)
400 kHz
Temp.
Ranges
I
I, E
Description:
The Microchip Technology Inc. 24AA01/24LC01B
(24XX01*) is a 1 Kbit Electrically Erasable PROM. The
device is organized as one block of 128 x 8-bit memory
with a 2-wire serial interface. Low-voltage design
permits operation down to 1.7V with standby and active
currents of only 1
μA
and 1 mA, respectively. The
24XX01 also has a page write capability for up to 8
bytes of data. The 24XX01 is available in the standard
8-pin PDIP, surface mount SOIC, TSSOP, 2x3 DFN,
2x3 TDFN and MSOP packages, and is also available
in the 5-lead SOT-23 and SC-70 packages.
100 kHz for V
CC
<2.5V.
Features:
• Single Supply with Operation down to 1.7V for
24AAXX Devices, 2.5V for 24LCXX Devices
• Low-Power CMOS Technology:
- Read current 1 mA, max.
- Standby current 1
μA,
max. (I-temp)
• 2-Wire Serial Interface, I
2
C™ Compatible
• Schmitt Trigger inputs for Noise Suppression
• Output Slope Control to eliminate Ground Bounce
• 100 kHz and 400 kHz Compatibility
• Page Write Time 3 ms, typical
• Hardware Write-Protect
• ESD Protection >4,000V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programmable Available
• Packages include 8-lead PDIP, SOIC, TSSOP,
DFN, TDFN, MSOP, 5-lead SOT-23 and SC-70
• Pb-free and RoHS Compliant
• Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Package Types
PDIP, MSOP
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
SOT-23/SC-70
SCL
Vss
SDA
Note:
1
2
3
4
Vcc
5
WP
A0 1
A1 2
A2 3
V
SS
4
V
CC
WP
SCL
A0
A1
A2
SOIC, TSSOP
1
2
3
4
DFN/TDFN
8 V
CC
7 WP
6 SCL
5 SDA
8
7
6
5
V
CC
WP
SCL
SDA
SDA V
SS
Pins A0, A1 and A2 are not used by the 24XX01 (no
internal connections).
Block Diagram
WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page Latches
I/O
SCL
YDEC
SDA
V
CC
V
SS
Sense Amp.
R/W Control
©
2009 Microchip Technology Inc.
DS21711J-page 1
24AA01/24LC01B
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
......................................................................................................... -0.3V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins
......................................................................................................................................................≥
4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I):
T
A
= -40°C to +85°C, V
CC
= +1.7V to +5.5V
Automotive (E): T
A
= -40°C to +125°C, V
CC
= +2.5V to +5.5V
Min.
—
DC CHARACTERISTICS
Param.
No.
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
Sym.
V
IH
—
V
IL
V
HYS
V
OL
I
LI
I
LO
C
IN
,
C
OUT
I
CC
read
I
CCS
Standby current
Characteristic
WP, SCL and SDA pins
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt
Trigger inputs
Low-level output voltage
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
Typ.
—
—
—
—
—
—
—
—
0.1
0.05
0.01
—
Max.
—
—
0.3 V
CC
—
0.40
±1
±1
10
3
1
1
5
Units
—
V
V
V
V
μA
μA
pF
mA
mA
μΑ
μΑ
—
—
—
(Note)
Conditions
0.7 V
CC
—
0.05 V
CC
—
—
—
—
—
—
—
—
I
OL
= 3.0 mA, V
CC
= 2.5V
V
IN
= V
SS
or V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 5.0V
(Note)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 5.5V, SCL = 400 kHz
—
Industrial
Automotive
SDA = SCL = V
CC
WP = V
SS
I
CC
write
Operating current
Note:
This parameter is periodically sampled and not 100% tested.
DS21711J-page 2
©
2009 Microchip Technology Inc.
24AA01/24LC01B
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
T
A
= -40°C to +85°C, V
CC
= +1.7V to +5.5V
Automotive (E): T
A
= -40°C to +125°C, V
CC
= +2.5V to +5.5V
Min.
—
—
600
4000
1300
4700
—
—
—
600
4000
600
4700
0
100
250
600
4000
—
—
1300
4700
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
400
100
—
—
—
—
300
1000
300
—
—
—
—
—
—
—
—
—
900
3500
—
—
Units
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<2.5V
(24AA01)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
(Note 1)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
(Note 2)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
AC CHARACTERISTICS
Param.
No.
1
2
3
4
5
6
7
8
9
10
11
12
Sym.
F
CLK
T
HIGH
T
LOW
T
R
T
F
T
HD
:
STA
T
SU
:
STA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
AA
T
BUF
Characteristic
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
(Note 1)
SDA and SCL fall time
Start condition hold time
Start condition setup
time
Data input hold time
Data input setup time
Stop condition setup
time
Output valid from clock
(Note 2)
Bus free-time: Time the
bus must be free before
a new transmission can
start
Output fall time from V
IH
minimum to V
IL
maximum
Input filter spike
suppression
(SDA and SCL pins)
Write cycle time
(byte or page)
Endurance
13
T
OF
20+0.1C
B
—
—
—
—
—
250
250
50
ns
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
(24AA01)
(Notes 1 and 3)
14
T
SP
ns
15
16
Note 1:
2:
3:
4:
T
WC
—
—
1M
—
—
5
—
ms
—
cycles 25°C,
(Note 4)
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a
T
I
specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
©
2009 Microchip Technology Inc.
DS21711J-page 3
24AA01/24LC01B
FIGURE 1-1:
BUS TIMING DATA
5
3
SCL
7
SDA
IN
6
14
2
4
8
9
10
11
SDA
OUT
12
FIGURE 1-2:
BUS TIMING START/STOP
D4
SCL
7
SDA
6
10
Start
Stop
DS21711J-page 4
©
2009 Microchip Technology Inc.
24AA01/24LC01B
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Name
A0
A1
A2
V
SS
SDA
SCL
WP
V
CC
PIN FUNCTION TABLE
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
DFN
1
2
3
4
5
6
7
8
TDFN
1
2
3
4
5
6
7
8
MSOP
1
2
3
4
5
6
7
8
SOT23
—
—
—
2
3
1
5
4
SC-70
—
—
—
2
3
1
5
4
Description
Not Connected
Not Connected
Not Connected
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
PDIP
1
2
3
4
5
6
7
8
2.1
A0, A1, A2
2.3
Serial Clock (SCL)
The A0, A1 and A2 pins are not used by the 24XX01.
They may be left floating or tied to either V
SS
or V
CC
.
The SCL input is used to synchronize the data transfer
to and from the device.
2.2
Serial Address/Data Input/Output
(SDA)
2.4
Write-Protect (WP)
This pin must be connected to either V
SS
or V
CC
.
If tied to V
SS
, normal memory operation is enabled
(read/write the entire memory 00-7F).
If tied to V
CC
, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
The SDA input is a bidirectional pin used to transfer
addresses and data into and out of the device. Since
it is an open-drain terminal, the SDA bus requires a
pull-up resistor to V
CC
(typical 10 kΩ for 100 kHz,
2 kΩ for 400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
©
2009 Microchip Technology Inc.
DS21711J-page 5
京公网安备 11010802033920号
EEWORLD
