SL28748ELCT datasheet, PDF - EEWORLD Datasheet

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SL28748ELCT: DescriptionProcessor Specific Clock Generator, 100MHz, CMOS, 5 X 5 MM, ROHS COMPLIANT, QFN-32; CategoryThe embedded processor and controller Microcontrollers and processors; File Size288KB，19 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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SL28748ELCT Overview

Processor Specific Clock Generator, 100MHz, CMOS, 5 X 5 MM, ROHS COMPLIANT, QFN-32

SL28748ELCT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	QFN
package instruction	5 X 5 MM, ROHS COMPLIANT, QFN-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	S-XQCC-N32
length	5 mm
Number of terminals	32
Maximum operating temperature	85 °C
Minimum operating temperature
Maximum output clock frequency	100 MHz
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Master clock/crystal nominal frequency	14.318 MHz
Certification status	Not Qualified
Maximum seat height	0.8 mm
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches	1

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SL28748

EProClock

Generator for Intel Calpella Chipset

Features

•

Intel CK505 Clock Revision 1.0 Compliant

• Hybrid Video Support - Simultaneous DOT96,

27MHz_SS and 27MHz_NSS video clocks

• PCI-Express Gen 2 Compliant

• Low power push-pull type differential output buffers

• Integrated voltage regulator

• Integrated resistors on differential clocks

• Scalable low voltage VDD_IO (3.3V to 1.05V)

• Wireless friendly 3-bits slew rate control on

single-ended clocks.

• Differential CPU clocks with selectable frequency

• 100MHz Differential SRC clocks

• 100MHz Differential SATA clocks

• 96MHz Differential DOT clock

• 27MHz Video clock

• Buffered Reference Clock 14.318MHz

• 14.318MHz Crystal Input or Clock input

• EProClock

Programmable Technology

• I

C support with readback capabilities

• Triangular Spread Spectrum profile for maximum

electromagnetic interference (EMI) reduction

• Industrial Temperature -40

C to 85

• 3.3V Power supply

• 32-pin QFN package

CPU

SRC

SATA DOT96 REF 27M

Block Diagram

Pin Configuration

CKPWRGD/ PD#

VDD_CPU

CPU0

CPU#0

VSS_CPU

CPU1

CPU#1

VDD_CPU_IO

VDD_SRC

9 10 11 12 13 14 15 16

SRC0# / SATA#

VDD_SRC_IO

SRC0 / SATA

VSS_SATA

CPU_STP#

VSS_SRC

SRC1

SRC1#

REF0/ FS**

XTAL_OUT

32 31 30 29 28 27 26 25

VDD_DOT

VSS_DOT

DOT96

DOT96#

VDD_27

27_NSS

27_SS

VSS_27

** Internal 100K-ohm Pull-Down Resistor

DOC#: SP-AP-0017 (Rev. AA)

400 West Cesar Chavez, Austin, TX 78701

1+(512) 416-8500

1+(512) 416-9669

Page 1 of 19

www.silabs.com

VSS_REF

VDD_REF

XTAL_IN

SDATA

SCLK

SL28748ELCT Related Products

	SL28748ELCT	SL28748ELC	SL28748ELI	SL28748ELIT
Description	Processor Specific Clock Generator, 100MHz, CMOS, 5 X 5 MM, ROHS COMPLIANT, QFN-32	Processor Specific Clock Generator, 100MHz, CMOS, 5 X 5 MM, ROHS COMPLIANT, QFN-32	Processor Specific Clock Generator, 100MHz, CMOS, 5 X 5 MM, ROHS COMPLIANT, QFN-32	Processor Specific Clock Generator, 100MHz, CMOS, 5 X 5 MM, ROHS COMPLIANT, QFN-32
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	QFN	QFN	QFN	QFN
package instruction	5 X 5 MM, ROHS COMPLIANT, QFN-32	5 X 5 MM, ROHS COMPLIANT, QFN-32	5 X 5 MM, ROHS COMPLIANT, QFN-32	5 X 5 MM, ROHS COMPLIANT, QFN-32
Contacts	32	32	32	32
Reach Compliance Code	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
JESD-30 code	S-XQCC-N32	S-XQCC-N32	S-XQCC-N32	S-XQCC-N32
length	5 mm	5 mm	5 mm	5 mm
Number of terminals	32	32	32	32
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Maximum output clock frequency	100 MHz	100 MHz	100 MHz	100 MHz
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Master clock/crystal nominal frequency	14.318 MHz	14.318 MHz	14.318 MHz	14.318 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Maximum supply voltage	3.465 V	3.465 V	3.465 V	3.465 V
Minimum supply voltage	3.135 V	3.135 V	3.135 V	3.135 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	INDUSTRIAL	INDUSTRIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	5 mm	5 mm	5 mm	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC	CLOCK GENERATOR, PROCESSOR SPECIFIC	CLOCK GENERATOR, PROCESSOR SPECIFIC	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches	1	1	1	1

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