IDT100474S2.7Y datasheet, PDF - EEWORLD Datasheet

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IDT100474S2.7Y: DescriptionStandard SRAM, 1KX4, 2.7ns, PDSO24; Categorystorage storage; File Size88KB，7 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT100474S2.7Y Overview

Standard SRAM, 1KX4, 2.7ns, PDSO24

IDT100474S2.7Y Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
package instruction	SOJ, SOJ24,.34
Reach Compliance Code	compliant
Maximum access time	2.7 ns
I/O type	SEPARATE
JESD-30 code	R-PDSO-J24
JESD-609 code	e0
memory density	4096 bit
Memory IC Type	STANDARD SRAM
memory width	4
Humidity sensitivity level	3
Negative supply voltage rating	-4.5 V
Number of terminals	24
word count	1024 words
character code	1000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	1KX4
Output characteristics	OPEN-EMITTER
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Encapsulate equivalent code	SOJ24,.34
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	-4.5 V
Certification status	Not Qualified
surface mount	YES
Temperature level	OTHER
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
Base Number Matches	1

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HIGH-SPEED BiCMOS

ECL STATIC RAM

4K (1K x 4-BIT) SRAM

Integrated Device Technology, Inc.

PRELIMINARY

IDT10474, IDT10A474

IDT100474, IDT100A474

IDT101474, IDT101A474

FEATURES:

• 1024-words x 4-bit organization

• Address access time: 2.7/3/3.5/4/4.5/5/7/8/10/15 ns

• Low power dissipation: 1000mW (typ.)

• Guaranteed Output Hold time

• Fully compatible with ECL logic levels

• Separate data input and output

• Corner and Center power pin pinouts

• Standard through-hole and surface mount packages

• Guaranteed-performance die available for MCMs/hybrids

• MIL-STD-883, Class B product available

DESCRIPTION:

The IDT10474(10A474), IDT100474(100A474) and

IDT101474(101A474) are 4,096-bit high-speed BiCMOS ECL

static random access memories organized as 1Kx4, with

separate data inputs and outputs. All I/Os are fully compatible

with ECL levels.

These devices are part of a family of asynchronous four-

bit-wide ECL SRAMs. This device is available in both the

traditional corner-power pinout, and "revolutionary" center-

power pin configurations. Because they are manufactured in

BiCMOS technology, power dissipation is greatly reduced

over equivalent bipolar devices. Low power operation pro-

vides higher system reliability and makes possible the use of

the plastic SOJ package for high-density surface mount

assembly.

The fast access time and guaranteed Output Hold time

allow greater margin for system timing variation. DataIN setup

time specified with respect to the trailing edge of Write Pulse

eases write timing allowing balanced Read and Write cycle

times.

FUNCTIONAL BLOCK DIAGRAM

DECODER

4,096-BIT

MEMORY

ARRAY

SENSE AMPS

AND READ/WRITE

CONTROL

2760 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE

Integrated Device Technology, Inc.

OCTOBER 1992

DSC-8022/3

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