PC28F640P30B85B datasheet, PDF

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PC28F640P30B85B: DescriptionFlash, 4MX16, 88ns, PBGA64, LEAD FREE, BGA-64; Categorystorage storage; File Size1MB，96 Pages; ManufacturerNumonyx ( Micron ); Websitehttps://www.micron.com

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PC28F640P30B85B Overview

Flash, 4MX16, 88ns, PBGA64, LEAD FREE, BGA-64

PC28F640P30B85B Parametric

Parameter Name	Attribute value
Parts packaging code	BGA
package instruction	LEAD FREE, BGA-64
Contacts	64
Reach Compliance Code	unknown
ECCN code	3A991.B.1.A
Maximum access time	88 ns
Other features	SYNCHRONOUS BURST MODE OPERATION ALSO POSSIBLE
startup block	BOTTOM
JESD-30 code	R-PBGA-B64
length	13 mm
memory density	67108864 bit
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of terminals	64
word count	4194304 words
character code	4000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	4MX16
Package body material	PLASTIC/EPOXY
encapsulated code	TBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE
Parallel/Serial	PARALLEL
Programming voltage	1.8 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	2 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
type	NOR TYPE
width	10 mm
Base Number Matches	1

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Numonyx™ StrataFlash

(P30)

Embedded Memory

Datasheet

Product Features

High performance

— 85 ns initial access

— 52 MHz with zero wait states, 17ns clock-to-data output

synchronous-burst read mode

— 25 ns asynchronous-page read mode

— 4-, 8-, 16-, and continuous-word burst mode

— Buffered Enhanced Factory Programming (BEFP) at 5

μs/

byte (Typ)

— 1.8 V buffered programming at 7

μs/byte

(Typ)

— Multi-Level Cell Technology: Highest Density at Lowest

Cost

— Asymmetrically-blocked architecture

— Four 32-KByte parameter blocks: top or bottom

configuration

— 128-KByte main blocks

Security

— One-Time Programmable Registers:

• 64 unique factory device identifier bits

• 2112 user-programmable OTP bits

— Selectable OTP Space in Main Array:

• Four pre-defined 128-KByte blocks (top or bottom

configuration)

• Up to Full Array OTP Lockout

— Absolute write protection: V

= V

— Power-transition erase/program lockout

— Individual zero-latency block locking

— Individual block lock-down

Architecture

Software

— 20

μs

(Typ) program suspend

— 20

μs

(Typ) erase suspend

— Numonyx™ Flash Data Integrator optimized

— Basic Command Set and Extended Command Set

compatible

— Common Flash Interface capable

Voltage and Power

— V

(core) voltage: 1.7 V – 2.0 V

— V

CCQ

(I/O) voltage: 1.7 V – 3.6 V

— Standby current: 20μA (Typ) for 64-Mbit

— 4-Word synchronous read current:

13 mA (Typ) at 40 MHz

Quality and Reliability

— Operating temperature: –40 °C to +85 °C

— Minimum 100,000 erase cycles per block

— ETOX™ VIII process technology

Density and Packaging

— 56- Lead TSOP package (64, 128, 256,

512- Mbit)

— 64- Ball Numonyx™ Easy BGA package (64,

128, 256, 512- Mbit)

— Numonyx™ QUAD+ SCSP (64, 128, 256,

512- Mbit)

— 16-bit wide data bus

306666-12

August 2008

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND

CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED

WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A

PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx

products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Legal L ines and D isc laim er s

Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice.

Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented

subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or

otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting

Numonyx's website at

http://www.numonyx.com.

Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries.

*Other names and brands may be claimed as the property of others.

Datasheet

August 2008

306666-12

P30

Contents

1.0

Functional Description

............................................................................................... 5

1.1

Introduction ....................................................................................................... 5

1.2

Overview ........................................................................................................... 5

1.3

Virtual Chip Enable Description.............................................................................. 6

1.4

Memory Maps ..................................................................................................... 6

Package Information

................................................................................................. 9

2.1

56-Lead TSOP..................................................................................................... 9

2.2

64-Ball Easy BGA Package .................................................................................. 10

2.3

QUAD+ SCSP Packages ...................................................................................... 12

Ballouts

................................................................................................................... 15

Signals

.................................................................................................................... 18

4.1

Dual-Die Configurations ..................................................................................... 20

Bus Operations

........................................................................................................ 21

5.1

Reads .............................................................................................................. 21

5.2

Writes.............................................................................................................. 21

5.3

Output Disable.................................................................................................. 21

5.4

Standby ........................................................................................................... 22

5.5

Reset............................................................................................................... 22

Command Set

.......................................................................................................... 23

6.1

Device Command Codes..................................................................................... 23

6.2

Device Command Bus Cycles .............................................................................. 24

Read

7.1

7.2

7.3

7.4

Operation........................................................................................................

Asynchronous Page-Mode Read ........................................................................... 26

Synchronous Burst-Mode Read............................................................................ 26

Read Device Identifier........................................................................................ 27

Read CFI.......................................................................................................... 27

2.0

3.0

4.0

5.0

6.0

7.0

8.0

Program Operation

.................................................................................................. 28

8.1

Word Programming ........................................................................................... 28

8.2

Factory Word Programming ................................................................................ 29

8.3

Buffered Programming ....................................................................................... 29

8.4

Buffered Enhanced Factory Programming.............................................................. 30

8.4.1 BEFP Requirements and Considerations ..................................................... 30

8.4.2 BEFP Setup Phase .................................................................................. 31

8.4.3 BEFP Program/Verify Phase ..................................................................... 31

8.4.4 BEFP Exit Phase ..................................................................................... 32

8.5

Program Suspend .............................................................................................. 32

8.6

Program Resume............................................................................................... 32

8.7

Program Protection............................................................................................ 33

Erase Operations

..................................................................................................... 34

9.1

Block Erase ...................................................................................................... 34

9.2

Erase Suspend .................................................................................................. 34

9.3

Erase Resume................................................................................................... 35

9.4

Erase Protection ................................................................................................ 35

9.0

10.0 Security Modes

........................................................................................................ 36

10.1 Block Locking.................................................................................................... 36

10.1.1 Lock Block............................................................................................. 36

10.1.2 Unlock Block.......................................................................................... 36

August 2008

306666-12

Datasheet

P30

10.2

10.1.3 Lock-Down Block ....................................................................................36

10.1.4 Block Lock Status ...................................................................................37

10.1.5 Block Locking During Suspend ..................................................................37

Selectable One-Time Programmable Blocks ...........................................................38

11.0 Registers

.................................................................................................................39

11.1 Read Status Register..........................................................................................39

11.1.1 Clear Status Register ..............................................................................40

11.2 Read Configuration Register ................................................................................40

11.2.1 Read Mode.............................................................................................41

11.2.2 Latency Count ........................................................................................41

11.2.3 WAIT Polarity .........................................................................................43

11.2.4 Data Hold ..............................................................................................44

11.2.5 WAIT Delay............................................................................................44

11.2.6 Burst Sequence ......................................................................................45

11.2.7 Clock Edge.............................................................................................45

11.2.8 Burst Wrap ............................................................................................46

11.2.9 Burst Length ..........................................................................................46

11.2.10 End of Word Line (EOWL) Considerations ...................................................46

11.3 One-Time-Programmable (OTP) Registers .............................................................46

11.3.1 Reading the OTP registers........................................................................47

11.3.2 Programming the OTP Registers................................................................48

11.3.3 Locking the OTP Registers........................................................................48

12.0 Power and Reset Specifications

...............................................................................49

12.1 Power-Up and Power-Down .................................................................................49

12.2 Reset Specifications ...........................................................................................49

12.3 Power Supply Decoupling ....................................................................................50

13.0 Maximum Ratings and Operating Conditions

............................................................51

13.1 Absolute Maximum Ratings .................................................................................51

13.2 Operating Conditions..........................................................................................51

14.0 Electrical Specifications

...........................................................................................52

14.1 DC Current Characteristics ..................................................................................52

14.2 DC Voltage Characteristics ..................................................................................53

15.0 AC Characteristics

....................................................................................................54

15.1 AC Test Conditions.............................................................................................54

15.2 Capacitance ......................................................................................................55

15.3 AC Read Specifications .......................................................................................55

15.4 AC Write Specifications .......................................................................................62

16.0 Program and Erase Characteristics...........................................................................66

17.0 Ordering Information

...............................................................................................67

17.1 Discrete Products...............................................................................................67

17.2 SCSP Products...................................................................................................68

Supplemental Reference Information.......................................................................69

Conventions - Additional Information

......................................................................94

Revision History.......................................................................................................96

Datasheet

August 2008

306666-12

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