KM68V4000B, KM68U4000B Family
Document Title
512Kx8 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0
1.0
Initial draft
Finalize
- Change datasheet format
- Erase low power part from product
- Erase 70ns part from KM68U4000B family
- Power dissipation Improved 0.7 to 1.0W
- V
IL
(MAX) improved 0.4 to 0.6V.
- I
CC2
decreased 50 to 45mA.
Revised
- I
CC1
decreased 20 to 25mA
Draft Data
December 17, 1996
Januarary 14, 1998
Remark
Preliminary
Final
2.0
February 12, 1998
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 2.0
February 1998
KM68V4000B, KM68U4000B Family
512K×8 bit Low Power and Low Voltage CMOS Static RAM
FEATURES
•
Process Technology : TFT
•
Organization : 512K×8
•
Power Supply Voltage
KM68V4000B Family : 3.0~3.6V
KM68U4000B Family : 2.7~3.3V
•
Low Data Retention Voltage : 2V(Min)
•
Three state output and TTL Compatible
•
Package Type : 32-SOP, 32-TSOP2-400F/R
CMOS SRAM
GENERAL DESCRIPTION
The KM68V4000B and KM68U4000B families are fabricated
by SAMSUNG′s advanced CMOS process technology. The
families support various operating temperature range and have
various package type for user flexibility of system design. The
families also support low data retention voltage for battery
back-up operation with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
KM68V4000BL-L
KM68V4000BLI-L
KM68U4000BL-L
KM68U4000BLI-L
Operating Temperature
Commercial(0~70°C)
Industrial(-40~85°C)
Commercial(0~70°C)
Industrial(-40~85°C)
Vcc Range
3.0~3.6V
3.0~3.6V
2.7~3.3V
2.7~3.3V
Speed(ns)
70
1)
/85
1)
/100
85
1)
/100
85
1)
/100
85
1)
/100
Standby
(I
SB1
, Max)
15µA
20µA
15µA
20µA
45mA
32-SOP
32-TSOP2-F/R
Operating
(I
CC2
)
PKG Type
1. The paramerter is measured with 30pF test load.
PIN DESCRIPTION
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
A18
A16
A14
A12
A7
A6
A5
A4
A1
A0
32-SOP
32-TSOP2
Forward
25
24
23
22
21
20
19
18
17
32-TSOP2
Reverse
7
8
9
10
11
12
13
14
15
16
Row
select
Memory array
1024 rows
512×8 columns
I/O
1
I/O1
I/O2
I/O3
VSS
I/O
8
Data
cont
I/O Circuit
Column select
Data
cont
Name
CS
OE
WE
Function
Chip Select Input
Output Enable Input
Write Enable Input
Name
Function
A9 A8 A13A17A15 A10 A11 A3 A2
I/O
1
~I/O
8
Data Inputs/Outputs
Vcc
Vss
Power
Ground
CS
WE
OE
Control
logic
A
0
~A
18
Address Inputs
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 2.0
February 1998
KM68V4000B, KM68U4000B Family
PRODUCT LIST
Commercial Temp Products(0~70°C)
Part Name
KM68V4000BLG-7L
KM68V4000BLG-8L
KM68V4000BLG-10L
KM68V4000BLT-7L
KM68V4000BLT-8L
KM68V4000BLT-10L
KM68V4000BLR-7L
KM68V4000BLR-8L
KM68V4000BLR-10L
KM68U4000BLG-8L
KM68U4000BLG-10L
KM68U4000BLT-8L
KM68U4000BLT-10L
KM68U4000BLR-8L
KM68U4000BLR-10L
Function
32-SOP, 70ns, 3.3V,LL
32-SOP, 85ns, 3.3V,LL
32-SOP, 100ns, 3.3V,LL
32-TSOP2-F, 70ns, 3.3V,LL
32-TSOP2-F, 85ns, 3.3V,LL
32-TSOP2-F, 100ns, 3.3V,LL
32-TSOP2-R, 70ns, 3.3V,LL
32-TSOP2-R, 85ns, 3.3V,LL
32-TSOP2-R, 100ns, 3.3V,LL
32-SOP, 85ns, 3.0V,LL
32-SOP, 100ns, 3.0V,LL
32-TSOP2-F, 85ns, 3.0V,LL
32-TSOP2-F, 100ns, 3.0V,LL
32-TSOP2-R, 85ns, 3.0V,LL
32-TSOP2-R, 100ns, 3.0V,LL
CMOS SRAM
Industrial Temp Products(-40~85°C)
Part Name
Function
32-SOP, 85ns, 3.3V,LL
32-SOP, 100ns, 3.3V,LL
32-TSOP2-F, 85ns, 3.3V,LL
32-TSOP2-F, 100ns, 3.3V,LL
32-TSOP2-R, 85ns, 3.3V,LL
32-TSOP2-R, 100ns, 3.3V,LL
32-SOP, 85ns, 3.0V,LL
32-SOP, 100ns, 3.0V,LL
32-TSOP2-F, 85ns, 3.0V,LL
32-TSOP2-F, 100ns, 3.0V,LL
32-TSOP2-R, 85ns, 3.0V,LL
32-TSOP2-R, 100ns, 3.0V,LL
KM68V4000BLGI-8L
KM68V4000BLGI-10L
KM68V4000BLTI-8L
KM68V4000BLTI-10L
KM68V4000BLRI-8L
KM68V4000BLRI-10L
KM68U4000BLGI-8L
KM68U4000BLGI-10L
KM68U4000BLTI-8L
KM68U4000BLTI-10L
KM68U4000BLRI-8L
KM68U4000BLRI-10L
Note : LL means Low Low standby current
FUNCTIONAL DESCRIPTION
CS
H
L
L
L
OE
X
1)
H
L
X
1)
WE
X
1)
H
H
L
I/O
High-Z
High-Z
Dout
Din
Mode
Deselected
Output Disabled
Read
Write
Power
Standby
Active
Active
Active
1. X means don′t care (Must be in low or high state)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Soldering temperature and time
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
-40 to 85
T
SOLDER
260°C, 10sec (Lead Only)
Ratings
-0.5 to V
CC
+0.5
-0.3 to 4.6
1
-65 to 150
0 to 70
Unit
V
V
W
°C
°C
°C
-
Remark
-
-
-
-
KM68V4000BL, KM68U4000BL
KM68V4000BLI, KM68U4000BLI
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 2.0
February 1998
KM68V4000B, KM68U4000B Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Product
KM68V4000B Family
KM68U4000B Family
All Family
KM68V4000B, KM68U4000B Family
KM68V4000B, KM68U4000B Family
Min
3.0
2.7
0
2.2
-0.3
3)
Typ
3.3
3.0
0
-
-
CMOS SRAM
Max
3.6
3.3
0
Vcc+0.3
2)
0.6
Unit
V
V
V
V
Note:
1. Commercial Product : T
A
=0 to 70°C, otherwise specified
Industrial Product : T
A
=-40 to 85°C, otherwise specified
2. Overshoot : V
CC
+3.0V in case of pulse width
≤
30ns
3. Undershoot : -3.0V in case of pulse width
≤
30ns
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply
Symbol
I
LI
I
LO
I
CC
I
CC1
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
Standby
1. Industrial product = 20µA
Test Conditions
V
IN
=Vss to Vcc
CS=V
IH
or OE=V
IH
or WE=V
IL
V
IO
=Vss to Vcc
I
IO
=0mA, CS=V
IL
, V
IN
=V
IL
or V
IH
, Read
Cycle time=1µs, 100% duty, I
IO
=0mA, CS≤0.2V
V
IN
≤0.2V
or V
IN
≥Vcc-0.2V
Read
Write
Min
-1
-1
-
-
-
-
-
2.2
-
-
Typ
-
-
-
-
-
-
-
-
-
-
Max
1
1
10
10
25
45
0.4
-
0.5
15
1)
Unit
µA
µA
mA
mA
mA
V
V
mA
µA
Average operating current
Cycle time=Min, 100% duty, I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
I
OL
=2.1mA
I
OH
=-1.0mA
CS=V
IH
, Other inputs = V
IL
or V
IH
CS≥Vcc-0.2V, Other inputs=0~Vcc
V
OL
V
OH
I
SB
I
SB1
4
Revision 2.0
February 1998
KM68V4000B, KM68U4000B Family
AC OPERATING CONDITIONS
TEST CONDITIONS
( Test Load and Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and falling time : 5ns
Input and output reference voltage :1.5V
Output load(see right) : C
L
=100pF+1TTL
C
L
1)
=30pF+1TTL
1. KM68V4000B-7, KM68V4000B-8 Family and KM68U4000B-8 Family
CMOS SRAM
C
L
1)
1. Including scope and jig capacitance
AC CHARACTERISTICS
(KM68V4000B Family : Vcc=3.0~3.6V, KM68U4000B Family : Vcc=2.7~3.3V
Commercial product :T
A
=0 to 70°C, Industrial product : T
A
=-40 to 85°C)
Speed Bins
Parameter List
Symbol
70ns
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Read
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
70
-
-
-
10
5
0
0
10
70
60
0
60
55
0
0
30
0
5
Max
-
70
70
35
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
Min
85
-
-
-
10
5
0
0
10
85
70
0
70
55
0
0
35
0
5
85ns
Max
-
85
85
40
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
100ns
Min
100
-
-
-
10
5
0
0
15
100
80
0
80
70
0
0
40
0
5
Max
-
100
100
50
-
-
30
30
-
-
-
-
-
-
-
30
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
1. Industrial product = 20µA
Symbol
V
DR
I
DR
t
SDR
t
RDR
Test Condition
CS≥Vcc-0.2V
Vcc=3.0V, CS≥Vcc-0.2V
See data retention waveform
Min
2.0
-
0
5
Typ
-
0.5
-
-
Max
3.6
15
1)
-
-
Unit
V
µA
ms
5
Revision 2.0
February 1998