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UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
www.ti.com
SLUS223C – APRIL 1997 – REVISED JUNE 2007
CURRENT MODE PWM CONTROLLER
FEATURES
•
•
•
•
•
•
•
•
•
•
•
Optimized For Off-line and DC-to-DC
Converters
Low Start-Up Current (<1 mA)
Automatic Feed Forward Compensation
Pulse-by-Pulse Current Limiting
Enhanced Load Response Characteristics
Under-Voltage Lockout With Hysteresis
Double Pulse Suppression
High Current Totem Pole Output
Internally Trimmed Bandgap Reference
500-kHz Operation
Low R
O
Error Amp
DESCRIPTION
The UC1842/3/4/5 family of control devices provides
the necessary features to implement off-line or
dc-to-dc fixed frequency current mode control
schemes with a minimal external parts count.
Internally implemented circuits include under-voltage
lockout featuring start up current less than 1 mA, a
precision reference trimmed for accuracy at the error
amp input, logic to insure latched operation, a PWM
comparator which also provides current limit control,
and a totem pole output stage designed to source or
sink high peak current. The output stage, suitable for
driving N-Channel MOSFETs, is low in the off state.
Differences between members of this family are the
under-voltage lockout thresholds and maximum duty
cycle ranges. The UC1842 and UC1844 have UVLO
thresholds of 16 V
ON
and 10 V
OFF
, ideally suited to
off-line applications. The corresponding thresholds
for the UC1843 and UC1845 are 8.4 V and 7.6 V.
The UC1842 and UC1843 can operate to duty cycles
approaching 100%. A range of zero to 50% is
obtained by the UC1844 and UC1845 by the addition
of an internal toggle flip flop which blanks the output
off every other clock cycle.
BLOCK DIAGRAM
V
cc
7 12
UVLO
34 V
S/R
GROUND
5
9
2.50 V
VREF
Good
Logic
4
R
T
/C
T
7
OSC
Error
Amp
V
FB
2
3
1
5
T
2R
R
1V
S
R
CURRENT
SENSE
COMPARATOR
PWM
LATCH
5
8
6 10
OUTPUT
Internal
BIAS
5V
REF
8 14
V
REF
5V
50 mA
7 11
V
C
COMP 1
CURRENT
SENSE
3
POWER
GROUND
Note 1:
A/B
A = DIL−8 Pin Number. B = SO−14 and CFP−14 Pin Number.
Note 2:
Toggle flip flop used only in 1844 and 1845.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2007, Texas Instruments Incorporated
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
SLUS223C – APRIL 1997 – REVISED JUNE 2007
www.ti.com
ABSOLUTE MAXIMUM RATINGS
(1)
UNIT
Supply voltage
Output current
Output energy (capacitive load)
Analog inputs (Pins 2, 3)
Error amp output sink current
T
A
≤
25°C (DIL-8)
Power dissipation
Storage temperature range
Junction temperature range
Lead temperature (soldering, 10 seconds)
(1)
T
A
≤
25°C (SOIC-14)
T
A
≤
25°C (SOIC-8)
Low impedance source
I
CC
< 30 mA
30 V
Self Limiting
±1
A
5
µJ
–0.3 V to 6.3 V
10 mA
1W
725 mW
650 mW
–65°C to 150°C
–55°C to 150°C
300°C
All voltages are with respect to Pin 5. All currents are positive into the specified terminal. Consult Packaging Section of Databook for
thermal limitations and considerations of packages.
CONNECTION DIAGRAMS
DIL-8, SOIC-8
N or J PACKAGE, D8 PACKAGE
(TOP VIEW)
PLCC-20
Q PACKAGE
(TOP VIEW)
COMP
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
8
7
6
5
V
REF
V
CC
OUTPUT
GROUND
NC
V
FB
NC
V
REF
NC
V
CC
V
C
OUTPUT
GROUND
PWR GND
I
SENSE
NC
4
5
6
7
8
NC
COMP
NC
V
REF
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
NC
V
CC
V
C
NC
OUTPUT
NC
SOIC-14, CFP-14
D or W PACKAGE
(TOP VIEW)
COMP
NC
V
FB
NC
I
SENSE
NC
R
T
/C
T
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC − No internal connection
2
Submit Documentation Feedback
NC
R
T
/ C
T
NC
PWR GND
GROUND
www.ti.com
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
SLUS223C – APRIL 1997 – REVISED JUNE 2007
THERMAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PACKAGE
DIL-8
SOIC-8
SOIC-14
CFP-14
PLCC-20
(1)
(2)
J
N
D8
D14
W
Q
θ
JC
28
(1)
25
42
35
5.49°C/W
34
θ
JA
125-160
110
(2)
84-160
(2)
50-120
(2)
175.4C/W
43-75
(2)
θ
JC
data values stated were derived from MIL-STD-1835B.
Specified
θ
JA
(junction to ambient) is for devices mounted to 5 in
2
FR4 PC board with one ounce copper where noted. When resistance
range is given, lower values are for 5 in
2
. Test PWB was 0.062 in thick and typically used 0.635-mm trace widths for power packages
and 1.3-mm trace widths for non-power packages with 100 x 100-mil probe land area at the end of each trace.
DISSIPATION RATINGS
PACKAGE
W
T
A
≤
25°C
POWER RATING
700 mW
DERATING FACTOR
ABOVE T
A
≤
25°C
5.5 mW/°C
T
A
≤
70°C
POWER RATING
452 mW
T
A
≤
85°CPO
WER RATING
370 mW
T
A
≤
125°C
POWER RATING
150 mW
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, these specifications apply for –55°C
≤
T
A
≤
125°C for the UC184X; –40°C
≤
T
A
≤
85°C for the
UC284X; 0°C
≤
T
A
≤
70°C for the 384X; V
CC
= 15 V
(1)
; R
T
= 10 kΩ; C
T
= 3.3 nF, T
A
= T
J
.
PARAMETER
REFERENCE SECTION
Output Voltage
Line Regulation
Load Regulation
Temp. Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
OSCILLATOR SECTION
Initial Accuracy
Voltage Stability
Temp. Stability
Amplitude
(1)
(2)
(3)
T
J
= 25°C
(4)
12
≤
V
CC
≤
25 V
T
MIN
≤
T
A
≤
T
MAX
(2)
(2)
TEST CONDITIONS
UC1842/3/4/5
UC2842/3/4/5
MIN
TYP
5.00
6
6
0.2
MAX
5.05
20
25
0.4
5.1
50
5
–30
47
–100
52
0.2%
5%
1.7
25
–180
57
1%
UC3842/3/4/5
MIN
4.90
TYP
5.00
6
6
0.2
4.82
50
5
–30
47
–100
52
0.2%
5%
1.7
25
–180
57
1%
MAX
5.10
20
25
0.4
5.18
UNIT
T
J
= 25°C, I
O
= 1 mA
12
≤
V
IN
≤
25 V
1
≤
I
0
≤
20 mA
See
(2) (3)
(2)
4.95
V
mV
mV/°C
V
µV
mV
mA
kHz
Line, load, tempature
T
A
= 125°C, 1000
4.9
10 Hz≤ f
≤
10 kHz, T
J
= 25°C
(2)
Hrs
(2)
V
PIN
4 peak-to-peak
V
(4)
Adjust V
CC
above the start threshold before setting at 15 V.
These parameters, although specified, are not 100% tested in production.
Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation:
V
(max)
*
VREF (min)
Temp Stability
+
REF
TJ(max)
*
TJ (min)
V
REF(max)
and V
REF(min)
are the maximum and minimum reference voltages measured over
the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature.
Output frequency equals oscillator frequency for the UC1842 and UC1843.
Output frequency is one half oscillator frequency for the UC1844 and UC1845.
Submit Documentation Feedback
3
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
SLUS223C – APRIL 1997 – REVISED JUNE 2007
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise stated, these specifications apply for –55°C
≤
T
A
≤
125°C for the UC184X; –40°C
≤
T
A
≤
85°C for the
UC284X; 0°C
≤
T
A
≤
70°C for the 384X; V
CC
= 15 V; R
T
= 10 kΩ; C
T
= 3.3 nF, T
A
= T
J
.
PARAMETER
ERROR AMP SECTION
Input Voltage
Input Bias Current
A
VOL
Unity Gain Bandwidth
PSRR
Output Sink Current
Output Source Current
V
OUT
High
V
OUT
Low
CURRENT SENSE SECTION
Gain
Maximum Input Signal
PSRR
Input Bias Current
Delay to Output
OUTPUT SECTION
Output Low Level
Output High Level
Rise Time
Fall Time
I
SINK
= 20 mA
I
SINK
= 200 mA
I
SOURCE
= 20 mA
I
SOURCE
= 200 mA
T
J
= 25°C, C
L
= 1 nF
T
J
= 25°C, C
L
=
X842/4
X843/5
X842/4
X843/5
X842/3
X844/5
(5)
TEST CONDITIONS
UC1842/3/4/5
UC2842/3/4/5
MIN
TYP
2.50
–0.3
90
1
70
6
–0.8
6
0.7
2.85
3
1
70
–2
–10
300
0.4
2.2
150
0.1
1.5
13
12
13.5
13.5
50
50
15
7.8
9
7.0
95%
46%
16
8.4
10
7.6
97%
48%
150
150
17
9.0
11
8.2
100%
50%
0%
0.5
1
17
1.1
3.15
1.1
MAX
2.55
–1
UC3842/3/4/5
MIN
2.42
65
0.7
60
2
–0.5
5
TYP
2.50
–0.3
90
1
70
6
–0.8
6
0.7
2.85
0.9
3
1
70
–2
150
0.1
1.5
13
12
13.5
13.5
50
50
14.5
7.8
8.5
7.0
95%
47%
16
8.4
10
7.6
97%
48%
150
150
17.5
9.0
11.5
8.2
100%
50%
0%
0.5
11
30
34
1
17
–10
300
0.4
2.2
1.1
3.15
1.1
MAX
2.58
–2
UNIT
V
PIN 1
= 2.5 V
2
≤
V
O
≤
4 V
T
J
= 25°C
(5)
2.45
65
0.7
60
2
–0.5
5
V
µA
dB
MHz
dB
mA
V
12
≤
V
CC
≤
25 V
V
PIN 2
= 2.7 V, V
PIN 1
= 1.1 V
V
PIN 2
= 2.3 V, V
PIN 1
= 5 V
V
PIN 2
= 2.3 V, R
L
= 15 kΩ to ground
V
PIN 2
= 2.7 V, R
L
= 15 kΩ to Pin 8
See
(6) (7)
(6)
(5) (6)
V/V
V
dB
µA
ns
V
PIN 1
= 5 V
0.9
12
≤
V
CC
≤
25 V
V
PIN 3
= 0 V to 2 V
(5)
V
1nF
(5)
ns
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold
Min. Operating Voltage After
Turn On
PWM SECTION
Maximum Duty Cycle
Minimum Duty Cycle
TOTAL STANDBY CURRENT
Start-Up Current
Operating Supply Current
V
CC
Zener Voltager
(5)
(6)
(7)
V
PIN 2
= V
PIN 3
= 0 V
I
CC
= 25 mA
30
11
34
mA
V
V
These parameters, although specified, are not 100% tested in production.
Parameter measured at trip point of latch with V
PIN 2
= 0.
A
+
DVPIN
1 , 0
v
VPIN 3
v
0.8 V
DVPIN
3
Gain defined as:
4
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