WM8960GEFL/V datasheet, PDF - EEWORLD Datasheet

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WM8960GEFL/V: DescriptionPCM Codec, A/MU-Law, 1-Func, CMOS, PQCC32, 5 X 5 MM, 0.90 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, MO-220-VHHD-5, QFN-32; CategoryWireless rf/communication Telecom circuit; File Size1MB，89 Pages; ManufacturerCirrus Logic; Websitehttp://www.cirrus.com; Environmental Compliance

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WM8960GEFL/V Overview

PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC32, 5 X 5 MM, 0.90 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, MO-220-VHHD-5, QFN-32

WM8960GEFL/V Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
package instruction	HVQCCN,
Reach Compliance Code	compliant
Law of compression and extension	A/MU-LAW
filter	YES
JESD-30 code	S-PQCC-N32
length	5 mm
Number of functions	1
Number of terminals	32
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Maximum seat height	1 mm
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	PCM CODEC
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	5 mm
Base Number Matches	1

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DESCRIPTION

The WM8960 is a low power, high quality stereo codec

designed for portable digital audio applications.

Stereo class D speaker drivers provide 1W per channel into 8Ω

loads with a 5V supply. Low leakage, excellent PSRR and

pop/click suppression mechanisms also allow direct battery

connection to the speaker supply. Flexible speaker boost

settings allow speaker output power to be maximised while

minimising other analogue supply currents.

A highly flexible input configuration for up to three stereo

sources is integrated, with a complete microphone interface.

External component requirements are drastically reduced as no

separate microphone, speaker or headphone amplifiers are

required. Advanced on-chip digital signal processing performs

automatic level control for the microphone or line input.

Stereo 24-bit sigma-delta ADCs and DACs are used with low

power over-sampling digital interpolation and decimation filters

and a flexible digital audio interface.

The master clock can be input directly or generated internally by

an onboard PLL, supporting most commonly-used clocking

schemes.

The WM8960 operates at analogue supply voltages down to

2.7V, although the digital supplies can operate at voltages down

to 1.71V to save power. The speaker supply can operate at up

to 5.5V, providing 1W per channel into 8Ω loads. Unused

functions can be disabled using software control to save power.

The WM8960 is supplied in a very small and thin 5x5mm QFN

package, ideal for use in hand-held and portable systems.

DGND

Jack Detect

WM8960

Stereo CODEC with 1W Stereo Class D Speaker Drivers and

Headphone Drivers for Portable Audio Applications

FEATURES

•

DAC SNR 98dB (‘A’ weighted), THD -84dB at 48kHz, 3.3V

ADC SNR 94dB (‘A’ weighted), THD -82dB at 48kHz, 3.3V

Pop and click suppression

3D Enhancement

Stereo Class D Speaker Driver

•

<0.1% THD with 1W per channel into 8Ω BTL speakers

•

70dB PSRR @217Hz

•

87% efficiency (1W output)

•

Flexible internal switching clock

On-chip Headphone Driver

•

40mW output power into 16Ω at 3.3V

•

Capless mode support

•

THD -75dB at 20mW, SNR 90dB with 16Ω load

Microphone Interface

•

Pseudo differential for high noise immunity

•

Integrated low noise MICBIAS

•

Programmable ALC / Limiter & Noise Gate

Low Power Consumption

Low Supply Voltages

•

Analogue 2.7V to 3.6V (Speaker supply up to 5.5V)

•

Digital core and I/O: 1.71V to 3.6V

On-chip PLL provides flexible clocking scheme

Sample rates: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48

5x5x0.9mm QFN package

•

APPLICATIONS

•

Games consoles

Portable media / DVD players

Mobile multimedia

DCVDD

DBVDD

0 to -21dB,

3dB steps

0 to -21dB,

3dB steps

-73 to 6dB

1dB steps,

mute

+BOOST

LINPUT3/

JD2

LINPUT2

WM8960

CLASS D

SPKVDD1

SPKVDD2

SPK_LP

SPK_LN

-12 -> 6dB,

3dB steps,

mute

-17.25 to +30dB,

0.75dB steps

-12 -> 6dB,

3dB steps,

mute

LEFT

MIXER

vmid

0, 13, 20,

29dB,

mute

INPUT

PGAs

ADC

LINPUT1

ADC

DIGITAL

FILTERS

ALC

DAC

DIGITAL

FILTERS

DE-

EMPHASIS

3D ENHANCE

VOLUME

DAC

-73 to 6dB

1dB steps,

mute

HP_L

MONO

MIXER

0dB / -6dB

OUT3

RINPUT1

vmid

-17.25 to +30dB,

0.75dB steps

0, 13, 20,

29dB,

mute

VOLUME

-12 -> 6dB,

3dB steps,

mute

ADC

DAC

RIGHT

MIXER

0 to -21dB,

3dB steps

0 to -21dB,

3dB steps

-73 to 6dB

1dB steps,

mute

+BOOST

-73 to 6dB

1dB steps,

mute

HP_R

-12 -> 6dB,

3dB steps,

mute

RINPUT2

RINPUT3/

JD3

Jack Detect

ADCREF,

DACREF

50K

CLASS D

SPK_RN

SPK_RP

GPIO1

MICBIAS

DIGITAL AUDIO

INTERFACE

A-law and u-law support

PLL

CONTROL

INTERFACE

SPKGND1

SPKGND2

AGND

AVDD

VMID

BCLK

ADCLRC/GPIO1

ADCDAT

DACLRC

DACDAT

MCLK

WOLFSON MICROELECTRONICS plc

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Production Data, February 2009, Rev 4.0

Wolfson Microelectronics plc

SCLK

SDIN

WM8960

Production Data

TABLE OF CONTENTS

DESCRIPTION ....................................................................................................... 1

FEATURES............................................................................................................. 1

APPLICATIONS ..................................................................................................... 1

TABLE OF CONTENTS ......................................................................................... 2

PIN CONFIGURATION ........................................................................................... 3

ORDERING INFORMATION .................................................................................. 3

PIN DESCRIPTION ................................................................................................ 4

ABSOLUTE MAXIMUM RATINGS ......................................................................... 5

RECOMMENDED OPERATING CONDITIONS ..................................................... 5

ELECTRICAL CHARACTERISTICS ...................................................................... 6

OUTPUT PGA GAIN............................................................................................. 10

TYPICAL POWER CONSUMPTION .................................................................... 11

SIGNAL TIMING REQUIREMENTS ..................................................................... 13

SYSTEM CLOCK TIMING ............................................................................................ 13

AUDIO INTERFACE TIMING – MASTER MODE ......................................................... 13

AUDIO INTERFACE TIMING – SLAVE MODE ............................................................ 14

CONTROL INTERFACE TIMING – 2-WIRE MODE ..................................................... 15

INTERNAL POWER ON RESET CIRCUIT .......................................................... 16

DEVICE DESCRIPTION ....................................................................................... 18

INTRODUCTION.......................................................................................................... 18

INPUT SIGNAL PATH .................................................................................................. 19

ANALOGUE TO DIGITAL CONVERTER (ADC) .......................................................... 26

AUTOMATIC LEVEL CONTROL (ALC) ....................................................................... 28

OUTPUT SIGNAL PATH .............................................................................................. 31

ANALOGUE OUTPUTS ............................................................................................... 37

ENABLING THE OUTPUTS ......................................................................................... 41

HEADPHONE OUTPUT ............................................................................................... 41

CLASS D SPEAKER OUTPUTS .................................................................................. 42

VOLUME UPDATES .................................................................................................... 43

HEADPHONE JACK DETECT ..................................................................................... 45

THERMAL SHUTDOWN .............................................................................................. 46

GENERAL PURPOSE INPUT/OUTPUT ...................................................................... 47

DIGITAL AUDIO INTERFACE ...................................................................................... 48

AUDIO INTERFACE CONTROL .................................................................................. 52

CLOCKING AND SAMPLE RATES .............................................................................. 56

CONTROL INTERFACE .............................................................................................. 63

POWER MANAGEMENT ............................................................................................. 63

DIGITAL FILTER CHARACTERISTICS ............................................................... 82

ADC FILTER RESPONSES ......................................................................................... 82

DAC FILTER RESPONSES ......................................................................................... 83

DE-EMPHASIS FILTER RESPONSES ........................................................................ 84

APPLICATIONS INFORMATION ......................................................................... 85

RECOMMENDED EXTERNAL COMPONENTS........................................................... 85

IMPORTANT NOTICE .......................................................................................... 89

ADDRESS: ................................................................................................................... 89

PD, February 2009, Rev 4.0

WM8960GEFL/V Related Products

	WM8960GEFL/V
Description	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC32, 5 X 5 MM, 0.90 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, MO-220-VHHD-5, QFN-32
Is it Rohs certified?	conform to
package instruction	HVQCCN,
Reach Compliance Code	compliant
Law of compression and extension	A/MU-LAW
filter	YES
JESD-30 code	S-PQCC-N32
length	5 mm
Number of functions	1
Number of terminals	32
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Maximum seat height	1 mm
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	PCM CODEC
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	5 mm
Base Number Matches	1

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