STA680M
Automotive HD Radio™ baseband receiver - MRC enabled
Data brief
IIS serial audio interface with programmable
sample rate converter
Primary and secondary serial interfaces for
host micro communication based on industry
standard IIC and SPI
Several General purpose IOs
One Internal clock oscillator and two internal
PLLs
External clock input
1.2 V core supply; 3.3 V I/O supply
LFBGA168
TFBGA289
Features
AEC-Q100 qualified
IBOC (in-band on-channel) digital audio
broadcast signal decoding for AM/FM hybrid
and all-digital modes
Dual-channel HD 1.5 for background scanning
and data services or FM Maximum Ratio
Combining (MRC) Diversity algorithm
HD codec (HDC) audio decompression
Metadata support for HD Radio reception
MPS (main program service), SPS
(supplemental program service) and PAD
(program associated data) data decoding
Advanced HD Radio feature support:
– Apple ID3 tag
– Multicasting
– Electronic program guide (EPG)
– Real-time traffic
Automatic Audio Alignment (AAA) algorithm
support
Variable input base-band data-rate I2S-like
interface supporting 650, 675, 744.1875,
912 kS/s data rates
Secondary RF base-band interface for dual
tuner applications
Glueless interface to Synchronous SDRAM
addressing up to 512 Mbit of SDRAM in x16
configuration
Optional Serial Flash memory SPI interface for
application code storage
Description
The STA680M is an HD-radio base-band
processor for car-radio applications. The
STA680M functionality includes audio
decompression and data processing, while
multiple interfaces ensure flexible integration into
the system.
The STA680M takes full advantage of HD 1.5
Radio benefits including CD-like audio quality
from HD Radio FM broadcasts and FM-like audio
quality using HD Radio AM, while program
associated data or traffic information is received
from the second channel or, alternatively, it
features FM Maximum Ratio Combining Diversity
for superior reception performance.
STA680M supports FM/AM analog/digital AAA
algorithm by mean of specific FW.
Table 1. Device summary
Order code
STA680M
STA680MTR
STA680MD
STA680MDTR
Package
(1)
LFBGA 168 balls
(12x12x1.4 mm)
TFBGA 289 balls
(15x15x1.2 mm)
Packing
Tray
Tape & Reel
Tray
Tape & Reel
1. ECOPACK
®
compliant.
February 2019
DB3855 Rev 2
1/9
www.st.com
For further information contact your local STMicroelectronics sales office.
STA680M
Electrical specifications
2
2.1
Symbol
VDD
Electrical specifications
Absolute maximum ratings
Table 2. Absolute maximum ratings
Parameter
Core supply voltage
Generic IO supply voltage
Flash IO supply voltage
SDRAM IO supply voltage
Osc 1V8 supply voltage
PLL analog supply voltage
PLL digital supply voltage
SAF core supply voltage
Voltage on input pin
Voltage on output pin
-
-
-
-
-
-
-
-
-
-
R = 1.5 kΩ; C = 1.5 pF
Human Body Model,
LFBGA package
Charged device mode,
LFBGA package
Test condition
Min
-
-
-
-
-
-
-
-
-0.5
-0.5
Typ
1.47
3.6
3.6
3.6
1.95
2.75
1.47
1.47
-
-
Max
-
-
-
-
-
-
-
-
VDDIO+0.5
VDDIO+0.5
Units
V
V
V
V
V
V
V
V
V
V
VDD_GEN_IO
VDD_FSH_IO
VDD_RAM_IO
VDD_OSC
VDD_PLL_ANA
VDD_PLL_DIG
VDD_SAF
V
i
V
o
V
ESD
ESD absolute minimum
withstand voltage
>|±1000|
V
>|±500|
2.2
Symbol
R
th j-amb
T
stg
T
amb
T
j, max
Thermal data
Table 3. Thermal data
Parameter
Thermal resistance junction-to-ambient
Storage temperature
Operating ambient temperature
Maximum junction temperature
Test condition
BGA package,
JEDEC 2s2p PCB, free air
-
-
-
Value
44
-55 to 150
-40 to 85
125
Unit
°C/W
°C
°C
°C
DB3855 Rev 2
3/9
8
FPGA/CPLD
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