EEWORLDEEWORLDEEWORLD

Part Number

Search

XC95144XV-7TQ144I

Description
High-Performance CPLD
CategoryProgrammable logic devices    Programmable logic   
File Size59KB,9 Pages
ManufacturerXILINX
Websitehttps://www.xilinx.com/
Download Datasheet Parametric View All

XC95144XV-7TQ144I Overview

High-Performance CPLD

XC95144XV-7TQ144I Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerXILINX
Parts packaging codeQFP
package instructionTQFP-144
Contacts144
Reach Compliance Code_compli
ECCN codeEAR99
Other featuresYES
maximum clock frequency125 MHz
In-system programmableYES
JESD-30 codeS-PQFP-G144
JESD-609 codee0
JTAG BSTYES
length20 mm
Humidity sensitivity level3
Dedicated input times
Number of I/O lines117
Number of macro cells144
Number of terminals144
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize0 DEDICATED INPUTS, 117 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Encapsulate equivalent codeQFP144,.87SQ,20
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)225
power supply1.8/3.3,2.5 V
Programmable logic typeFLASH PLD
propagation delay7.5 ns
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum supply voltage2.62 V
Minimum supply voltage2.37 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width20 mm
0
R
XC95144XV High-Performance
CPLD
0
1
DS051 (v2.2) August 27, 2001
Advance Product Specification
Features
144 macrocells with 3,200 usable gates
Available in small footprint packages
- 100-pin TQFP (81 user I/O pins)
- 144-pin TQFP (117 user I/O pins)
- 144-pin CSP (117 user I/O pins)
Optimized for high-performance 2.5V systems
- Low power operation
- Multi-voltage operation
Advanced system features
- In-system programmable
- Two separate output banks
- Superior pin-locking and routability with
FastCONNECT II™ switch matrix
- Extra wide 54-input Function Blocks
- Up to 90 product-terms per macrocell with
individual product-term allocation
- Local clock inversion with three global and one
product-term clocks
- Individual output enable per output pin
- Input hysteresis on all user and boundary-scan pin
inputs
- Bus-hold ciruitry on all user pin inputs
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
Fast concurrent programming
Slew rate control on individual outputs
Enhanced data security features
Excellent quality and reliability
- Endurance exceeding 10,000 program/erase
cycles
- 20 year data retention
- ESD protection exceeding 2,000V
Power Estimation
Power dissipation in CPLDs can vary substantially depend-
ing on the system frequency, design application and output
loading. To help reduce power dissipation, each macrocell
in a XC9500XV device may be configured for low-power
mode (from the default high-performance mode). In addi-
tion, unused product-terms and macrocells are automati-
cally deactivated by the software to further conserve power.
For a general estimate of I
CC
, the following equation may be
used:
I
CC
(mA) =
MC
HP
(0.36) + MC
LP
(0.23) + MC(0.005 mA/MHz) f
Where:
MC
HP
= Macrocells in high-performance (default) mode
MC
LP
= Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
This calculation is based on typical operating conditions
using a pattern of 16-bit up/down counters in each Function
Block with no output loading. The actual I
CC
value varies
with the design application and should be verified during
normal system operation.
Figure 1
shows the above estimation in a graphical form.
200
200 MHz
150
Typical I
CC
(mA)
120 MHz
100
H ig
h
fo
Per
rma
nce
Description
The XC95144XV is a 2.5V CPLD targeted for high-perfor-
mance, low-voltage applications in leading-edge communi-
cations and computing systems. It is comprised of eight
54V18 Function Blocks, providing 3,200 usable gates with
propagation delays of 4 ns.
Lo
ow
wP
er
50
0
40
120
80
Clock Frequency (MHz)
160
200
DS051_01_012501
Figure 1:
Typical I
CC
vs. Frequency for XC95144XV
© 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS051 (v2.2) August 27, 2001
Advance Product Specification
www.xilinx.com
1-800-255-7778
1
Please help me!!!
I have implemented ADC using the 51 development board. How should I connect it? Thanks:congratulate:...
fwm123456 DIY/Open Source Hardware
TCL Shi Wanwen: The core of the future digital home is the "3C" flat-panel TV
[i=s]This post was last edited by jameswangsynnex on 2015-3-3 20:00[/i] Shi Wanwen, President of TCL Multimedia Business Unit, delivered a speech at the International Consumer Electronics Industry For...
lorant Mobile and portable
About AD18 export PDF3D
I would like to ask, when I first exported PDF3D with AD18, it was normal, that is, all the components were exported, and the view was the same as the 3D view, but when I exported it later, it was not...
gameboy22 PCB Design
I would like to ask you a question, multiple threads access the same global variable
I would like to ask you a question. If multiple threads access the same global variable, such as int A, and both threads can write to this variable A, then a lock is needed to protect the variable. Ho...
大帅 MCU
Please help analyze the function of this circuit
Please help me analyze the function of this circuit....
1173435506 Analog electronics
Introduction to MOS/CMOS integrated circuits and N-channel MOS tubes and P-channel MOS tubes
MOS/CMOS Integrated Circuits MOS integrated circuit features: The manufacturing process is relatively simple, the yield rate is high, the power consumption is low, the logic circuit is relatively simp...
f117c Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1571  1943  27  1155  705  32  40  1  24  15 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号