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TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E – JULY 1997 – REVISED OCTOBER 2000
features
applications
D
D
D
D
D
D
D
D
D
D
D
10-Bit Resolution 20 MSPS Sampling
Analog-to-Digital Converter (ADC)
Power Dissipation . . . 107 mW Typ
5-V Single Supply Operation
Differential Nonlinearity . . .
±0.5
LSB Typ
No Missing Codes
Power Down (Standby) Mode
Three State Outputs
Digital I/Os Compatible With 5-V or 3.3-V
Logic
Adjustable Reference Input
Small Outline Package (SOIC), Super Small
Outline Package (SSOP), or Thin Small
Outline Package (TSOP)
Pin Compatible With the Analog
Devices AD876
D
D
D
D
Communications
Multimedia
Digital Video Systems
High-Speed DSP Front-End . . . TMS320C6x
DB, DW, OR PW PACKAGE
(TOP VIEW)
description
The TLC876 is a CMOS, low-power, 10-bit, 20
13
16
MSPS analog-to-digital converter (ADC). The
14
15
speed, resolution, and single-supply operation
are suited for applications in video, multimedia,
NC – No internal connection
imaging, high-speed acquisition, and commu-
nications. The low-power and single-supply operation satisfy requirements for high-speed portable
applications. The speed and resolution ideally suit charge-coupled device (CCD) input systems such as color
scanners, digital copiers, electronic still cameras, and camcorders. A multistage pipelined architecture with
output error correction logic provides for no missing codes over the full operating temperature range. Force and
sense connections to the reference inputs provide a more accurate internal reference voltage to the reference
resistor string.
A standby mode of operation reduces the power to typically 15 mW. The digital I/O interfaces to either 5-V or
3.3-V logic and the digital output terminals can be placed in a high-impedance state. The format of the output
data is straight binary coding.
A pipelined multistaged architecture achieves a high sample rate with low power consumption. The TLC876
distributes the conversion over several smaller ADC sub-blocks, refining the conversion with progressively
higher accuracy as the device passes the results from stage to stage. This distributed conversion requires a
small fraction of the 1023 comparators used in a traditional flash ADC. A sample-and-hold amplifier (SHA) within
each of the stages permits the first stage to operate on a new input sample while the second through the fifth
stages operate on the four preceding samples.
The TLC876C is characterized for operation from 0°C to 70°C, the TLC876I is characterized for operation from
–40°C to 85°C, and the TLC876M is characterized for operation over the full military temperature range of –55°C
to 125°C.
AGND
DRV
DD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DRGND
DGND
1
2
3
4
5
6
7
8
9
10
11
12
28
27
26
25
24
23
22
21
20
19
18
17
AV
DD
AIN
CML
REFBS
REFBF
NC
REFTF
REFTS
DGND
AGND
DV
DD
STBY
OE
CLK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
©
2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
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1
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E – JULY 1997 – REVISED OCTOBER 2000
AVAILABLE OPTIONS
PACKAGE
TA
SUPER SMALL
OUTLINE
(DB)
TLC876CDB
TLC876IDB
—
SMALL
OUTLINE
(DW)
TLC876CDW
TLC876IDW
TLC876MDW
TSSOP
(PW)
TLC876CPW
TLC876IPW
—
0°C to 70°C
–40°C to 85°C
–55°C to 125°C
functional block diagram
SHA†
27
SHA†
GAIN
SHA†
GAIN
SHA†
GAIN
SHA†
GAIN
ADC
ADC
ADC
2
Correction Logic
10
Output Buffers
12
10
† Sample and hold amplifier
3
(MSB) D9
(LSB) D0
ADC
ADC
AIN
DAC
2
DAC
DAC
2
DAC
2
2
2
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TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E – JULY 1997 – REVISED OCTOBER 2000
equivalent input and output circuits
D0–D9 OUTPUT CIRCUIT
DVDD
DVDD
DRVDD
AIN
CLK
D0–D9
0.3 pF
DRGND
DRVDD
AVDD
30
Ω
typ
0.5 pF typ
ALL DIGITAL INPUT CIRCUITS
AIN INPUT CIRCUIT
DGND
DRGND
AGND
DGND
REFERENCE INPUT CIRCUIT
AVDD
30
REFTF
AVSS
AVDD
Internal Reference
Voltage
REFTS
29
AGND
AVDD
REFBS
35
Internal Reference
Voltage
AVSS
AVDD
34
REFBF
AGND
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3
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E – JULY 1997 – REVISED OCTOBER 2000
Terminal Functions
TERMINAL
NAME
AGND
AIN
AVDD
CLK
CML
DGND
DVDD
DRVDD
DRGND
D0 –D9
OE
REFBF
REFBS
REFTF
REFTS
STBY
NO.
1, 19
27
28
15
26
14, 20
18
2
13
3 – 12
16
24
25
22
21
17
O
I
I
I
I
I
I
I
O
I
I/O
Analog ground
Analog input
5-V analog supply
Clock input
Bypass for an internal bias point. Typically a 0.1
µF
capacitor minimum is connected from this terminal to ground.
Digital ground
5-V digital supply
3.3-V/5-V digital supply. Supply for digital input and output buffers.
3.3-V/5-V digital ground. Ground for digital input and output buffers.
Digital data out. D0:LSB, D9:MSB
Output enable. When OE = low or NC, the device is in normal operating mode. When OE = high, D0–D9 are high
impedance.
Reference bottom force
Reference bottom sense
Reference top force
Reference top sense
Standby enable. When STBY = low or NC, the device is in normal operating mode. When STBY = high, the device
is in standby mode.
DESCRIPTION
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, AV
DD
to AGND, DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6.5 V
Reference voltage input range to AGND, V
I(REFTF)
, V
I(REFBF)
, V
I(REFBS)
,
V
I(REFTS)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
Analog input voltage range to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to DV
DD
+ 0.3 V
Digital output voltage range applied from external source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to DV
DD
Operating virtual junction temperature range, T
J
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
Operating free-air temperature range, T
A
: TLC876C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
TLC876I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
TLC876M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
DB
DW
PW
TA
≤
25°C
POWER RATING
1353 mW
1598 mW
1207 mW
DERATING FACTOR
ABOVE TA = 25°C ‡
10.82 mW/°C
12.78 mW/°C
9.65 mW/°C
TA = 70°C
POWER RATING
866 mW
1023 mW
772 mW
TA = 85°C
POWER RATING
703 mW
831 mW
627 mW
TA = 125°C
POWER RATING
—
320 mW
—
‡ This is the inverse of the traditional junction-to-ambient thermal resistance (RΘJA). Thermal resistance is not production tested,
and values given are for informational purposes only.
4
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