MC74ACT377ML2 datasheet, PDF - EEWORLD Datasheet

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MC74ACT377ML2: DescriptionIC,FLIP-FLOP,OCTAL,D TYPE,ACT-CMOS,SOP,20PIN,PLASTIC; Categorylogic logic; File Size199KB，6 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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MC74ACT377ML2 Overview

IC,FLIP-FLOP,OCTAL,D TYPE,ACT-CMOS,SOP,20PIN,PLASTIC

MC74ACT377ML2 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ON Semiconductor
package instruction	SOP, SOP20,.3
Reach Compliance Code	not_compliant
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	D FLIP-FLOP
Maximum Frequency@Nom-Sup	125000000 Hz
MaximumI(ol)	0.024 A
Number of functions	8
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP20,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
method of packing	TAPE AND REEL
power supply	5 V
Certification status	Not Qualified
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
Base Number Matches	1

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MC74AC377

MC74ACT377

Octal D Flip Flop

with Clock Enable

The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with

individual D inputs and Q outputs. The common buffered Clock (CP) input loads

all flip-flops simultaneously, when the Clock Enable (CE) is LOW.

The register is fully edge-triggered. The state of each D input, one setup time

before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-

flop’s Q output. The CE input must be stable only one setup time prior to the

LOW-to-HIGH clock transition for predictable operation.

•

Ideal for Addressable Register Applications

Clock Enable for Address and Data Synchronization Applications

Eight Edge-Triggered D Flip-Flops

Buffered Common Clock

Outputs Source/Sink 24 mA

See MC74AC273 for Master Reset Version

See MC74AC373 for Transparent Latch Version

See MC74AC374 for 3-State Version

′ACT377

Has TTL Compatible Inputs

VCC

DW SUFFIX

CASE 751D-04

PLASTIC

OCTAL D

FLIP-FLOP WITH

CLOCK ENABLE

N SUFFIX

CASE 738-03

PLASTIC

LOGIC SYMBOL

GND

O0 O1 O2 O3 O4 O5 O6 O7

D0 D1 D2 D3 D4 D5 D6 D7

PIN NAMES

D0–D7

Q0–Q7

Data Inputs

Clock Enable (Active LOW)

Data Outputs

Clock Pulse Input

MODE SELECT-FUNCTION TABLE

Inputs

Operating Mode

Load

′1′

Load

′0′

Hold (Do Nothing)

No Change

Outputs

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

= LOW-to-HIGH Clock Transition

FACT DATA

5-1

MC74ACT377ML2 Related Products

	MC74ACT377ML2	MC74ACT377ML1	MC74ACT377MR1	MC74AC377ML2	MC74AC377ML1	MC74AC377MR1	MC74AC377DTEL	MC74ACT377MR2
Description	IC,FLIP-FLOP,OCTAL,D TYPE,ACT-CMOS,SOP,20PIN,PLASTIC	IC,FLIP-FLOP,OCTAL,D TYPE,ACT-CMOS,SOP,20PIN,PLASTIC	IC,FLIP-FLOP,OCTAL,D TYPE,ACT-CMOS,SOP,20PIN,PLASTIC	IC,FLIP-FLOP,OCTAL,D TYPE,AC-CMOS,SOP,20PIN,PLASTIC	IC,FLIP-FLOP,OCTAL,D TYPE,AC-CMOS,SOP,20PIN,PLASTIC	IC,FLIP-FLOP,OCTAL,D TYPE,AC-CMOS,SOP,20PIN,PLASTIC	IC,FLIP-FLOP,OCTAL,D TYPE,AC-CMOS,TSSOP,20PIN,PLASTIC	ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, EIAJ, SO-20
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	ON Semiconductor	ON Semiconductor	ON Semiconductor	ON Semiconductor	ON Semiconductor	ON Semiconductor	ON Semiconductor	ON Semiconductor
package instruction	SOP, SOP20,.3	SOP, SOP20,.3	SOP, SOP20,.3	SOP, SOP20,.3	SOP, SOP20,.3	SOP, SOP20,.3	TSSOP, TSSOP20,.25	SOP, SOP20,.3
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
Maximum Frequency@Nom-Sup	125000000 Hz	125000000 Hz	125000000 Hz	75000000 Hz	75000000 Hz	75000000 Hz	75000000 Hz	125000000 Hz
MaximumI(ol)	0.024 A	0.024 A	0.024 A	0.012 A	0.012 A	0.012 A	0.012 A	0.024 A
Number of functions	8	8	8	8	8	8	1	1
Number of terminals	20	20	20	20	20	20	20	20
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP	SOP	SOP	TSSOP	SOP
Encapsulate equivalent code	SOP20,.3	SOP20,.3	SOP20,.3	SOP20,.3	SOP20,.3	SOP20,.3	TSSOP20,.25	SOP20,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE
method of packing	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL
power supply	5 V	5 V	5 V	3.3/5 V	3.3/5 V	3.3/5 V	3.3/5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	0.65 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
Nominal supply voltage (Vsup)	5 V	5 V	5 V	-	-	-	5 V	5 V
Minimum supply voltage (Vsup)	-	-	-	3 V	3 V	3 V	2 V	4.5 V

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