Philips Semiconductors
Product specification
Triacs
logic level
GENERAL DESCRIPTION
Passivated, sensitive gate triac in a full
pack plastic envelope, intended for use
in general purpose bidirectional
switching
and
phase
control
applications. This device is intended to
be interfaced directly to microcontrollers,
logic integrated circuits and other low
power gate trigger circuits.
BT137F-600D
QUICK REFERENCE DATA
SYMBOL
V
DRM
I
T(RMS)
I
TSM
PARAMETER
BT137F-
Repetitive peak off-state voltages
RMS on-state current
Non-repetitive peak on-state current
MAX.
600D
600
8
55
UNIT
V
A
A
PINNING - SOT186
PIN
1
2
3
DESCRIPTION
main terminal 1
PIN CONFIGURATION
case
SYMBOL
T2
main terminal 2
gate
1 2 3
T1
case isolated
G
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
V
DRM
I
T(RMS)
I
TSM
PARAMETER
Repetitive peak off-state
voltages
RMS on-state current
Non-repetitive peak
on-state current
I
2
t for fusing
Repetitive rate of rise of
on-state current after
triggering
full sine wave; T
hs
≤
73 ˚C
full sine wave; T
j
= 125 ˚C prior
to surge; with reapplied V
DRM(max)
t = 20 ms
t = 16.7 ms
t = 10 ms
I
TM
= 12 A; I
G
= 0.2 A;
dI
G
/dt = 0.2 A/µs
T2+ G+
T2+ G-
T2- G-
T2- G+
CONDITIONS
MIN.
-
-
-
-
-
-
-
-
-
-
-
-
-
-40
-
MAX.
600
1
8
55
60
15
50
50
50
10
2
5
5
0.5
150
125
UNIT
V
A
A
A
A
2
s
A/µs
A/µs
A/µs
A/µs
A
V
W
W
˚C
˚C
I
2
t
dI
T
/dt
I
GM
V
GM
P
GM
P
G(AV)
T
stg
T
j
Peak gate current
Peak gate voltage
Peak gate power
Average gate power
Storage temperature
Operating junction
temperature
over any 20 ms period
1
Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may
switch to the on-state. The rate of rise of current should not exceed 6 A/µs.
June 2001
1
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
ISOLATION LIMITING VALUE & CHARACTERISTIC
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
V
isol
PARAMETER
R.M.S. isolation voltage from all
three terminals to external
heatsink
CONDITIONS
f = 50-60 Hz; sinusoidal
waveform;
R.H.
≤
65% ; clean and dustfree
MIN.
-
BT137F-600D
TYP.
-
MAX.
1500
UNIT
V
C
isol
Capacitance from T2 to external f = 1 MHz
heatsink
-
12
-
pF
THERMAL RESISTANCES
SYMBOL
R
th j-hs
R
th j-a
PARAMETER
Thermal resistance
junction to heatsink
Thermal resistance
junction to ambient
CONDITIONS
full or half cycle
with heatsink compound
without heatsink compound
in free air
MIN.
-
-
-
TYP.
-
-
55
MAX.
4.5
6.5
-
UNIT
K/W
K/W
K/W
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
I
GT
PARAMETER
Gate trigger current
CONDITIONS
V
D
= 12 V; I
T
= 0.1 A
T2+ G+
T2+ G-
T2- G-
T2- G+
T2+ G+
T2+ G-
T2- G-
T2- G+
MIN.
-
-
-
-
-
-
-
-
-
-
-
0.25
-
TYP.
2.5
3.5
3.5
6.5
1.6
8.5
1.2
2.5
1.5
1.3
0.7
0.4
0.1
MAX.
5
5
5
10
15
20
15
20
10
1.65
1.5
-
0.5
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
V
mA
I
L
Latching current
V
D
= 12 V; I
GT
= 0.1 A
I
H
V
T
V
GT
I
D
Holding current
On-state voltage
Gate trigger voltage
Off-state leakage current
V
D
= 12 V; I
GT
= 0.1 A
I
T
= 10 A
V
D
= 12 V; I
T
= 0.1 A
V
D
= 400 V; I
T
= 0.1 A; T
j
= 125 ˚C
V
D
= V
DRM(max)
; T
j
= 125 ˚C
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
dV
D
/dt
t
gt
PARAMETER
Critical rate of rise of
off-state voltage
Gate controlled turn-on
time
CONDITIONS
V
DM
= 67% V
DRM(max)
; T
j
= 125 ˚C;
exponential waveform; R
GK
= 1 kΩ
I
TM
= 12 A; V
D
= V
DRM(max)
; I
G
= 0.1 A;
dI
G
/dt = 5 A/µs
MIN.
-
-
TYP.
5
2
MAX.
-
-
UNIT
V/µs
µs
June 2001
2
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
BT137F-600D
12
10
Ptot / W
Ths(max) / C
71
= 180
120
1
10
IT(RMS) / A
BT137X
80
89
90
60
30
8
73 C
8
6
4
2
0
6
98
4
107
116
125
10
2
0
2
4
6
IT(RMS) / A
8
0
-50
0
50
Ths / C
100
150
Fig.1. Maximum on-state dissipation, P
tot
, versus rms
on-state current, I
T(RMS)
, where
α
= conduction angle.
ITSM / A
IT
I TSM
time
Tj initial = 25 C max
Fig.4. Maximum permissible rms current I
T(RMS)
,
versus heatsink temperature T
hs
.
IT(RMS) / A
1000
25
20
15
100
dI
T
/dt limit
10
T2- G+ quadrant
5
10
10us
100us
1ms
T/s
10ms
100ms
0
0.01
0.1
1
surge duration / s
10
Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
≤
20ms.
ITSM / A
IT
T
ITSM
time
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
hs
≤
73˚C.
VGT(Tj)
VGT(25 C)
80
70
60
50
40
30
1.6
1.4
1.2
1
0.8
Tj initial = 25 C max
20
10
0.6
0.4
-50
0
1
10
100
Number of cycles at 50Hz
1000
0
50
Tj / C
100
150
Fig.3. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25˚C), versus junction temperature T
j
.
June 2001
3
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
BT137F-600D
3
2.5
2
1.5
IGT(Tj)
IGT(25 C)
T2+ G+
T2+ G-
T2- G-
T2- G+
25
IT / A
Tj = 125 C
Tj = 25 C
20
typ
Vo = 1.264 V
Rs = 0.0378 Ohms
max
15
10
1
5
0.5
0
-50
0
0
50
Tj / C
100
150
0
0.5
1
1.5
VT / V
2
2.5
3
Fig.7. Normalised gate trigger current
I
GT
(T
j
)/ I
GT
(25˚C), versus junction temperature T
j
.
IL(Tj)
IL(25 C)
Fig.10. Typical and maximum on-state characteristic.
10
Zth j-hs (K/W)
with heatsink compound
without heatsink compound
unidirectional
bidirectional
3
2.5
1
2
1.5
1
0.5
0
-50
0.01
10us
0.1ms
1ms
0.1
P
D
tp
t
0
50
Tj / C
100
150
10ms
tp / s
0.1s
1s
10s
Fig.8. Normalised latching current I
L
(T
j
)/ I
L
(25˚C),
versus junction temperature T
j
.
IH(Tj)
IH(25C)
Fig.11. Transient thermal impedance Z
th j-hs
, versus
pulse width t
p
.
dVD/dt (V/us)
1000
3
2.5
2
1.5
1
0.5
100
10
0
-50
0
50
Tj / C
100
150
1
0
50
Tj / C
100
150
Fig.9. Normalised holding current I
H
(T
j
)/ I
H
(25˚C),
versus junction temperature T
j
.
Fig.12. Typical, critical rate of rise of off-state voltage,
dV
D
/dt versus junction temperature T
j
.
June 2001
4
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
BT137F-600D
10.2
max
5.7
max
3.2
3.0
0.9
0.5
4.4
max
2.9 max
4.4
4.0
7.9
7.5
17
max
seating
plane
3.5 max
not tinned
4.4
13.5
min
1
0.4
M
2
3
0.9
0.7
2.54
5.08
top view
1.3
0.55 max
Fig.13. SOT186; The seating plane is electrically isolated from all terminals.
Notes
1. Refer to mounting instructions for F-pack envelopes.
2. Epoxy meets UL94 V0 at 1/8".
June 2001
5
Rev 1.000
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