PI6CQ3993-5Q datasheet, PDF - EEWORLD Datasheet

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PI6CQ3993-5Q: DescriptionPLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO28, QSOP-28; Categorylogic logic; File Size544KB，10 Pages; ManufacturerPericom Semiconductor Corporation (Diodes Incorporated); Websitehttps://www.diodes.com/

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PI6CQ3993-5Q Overview

PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO28, QSOP-28

PI6CQ3993-5Q Parametric

Parameter Name	Attribute value
Maker	Pericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging code	SOIC
package instruction	SOP,
Contacts	28
Reach Compliance Code	unknown
ECCN code	EAR99
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G28
JESD-609 code	e0
Logic integrated circuit type	PLL BASED CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	28
Actual output times	8
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.7 ns
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal location	DUAL
minfmax	85 MHz
Base Number Matches	1

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3Q0

VCCQ

REF

GND

TEST

2F1

VCCN

2Q1

2Q0

3Q1

3Q0

21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321

PI6C3Q991, PI6C3Q993

3.3V Programmable Skew PLL Clock Driver

SuperClock

Description

Features

PI6C3Q99X family provides following products:

PI6C3Q991: 32-pin PLCC version

PI6C3Q993: 28-pin QSOP version

Inputs are 5V I/O Tolerant

4 pairs of programmable skew outputs

Low skew: 200ps same pair; 250ps all outputs

Selectable positive or negative edge synchronization:

Excellent for DSP applications

Synchronous output enable

Output frequency: 3.75 MHz to 85 MHz

2x, 4x, 1/2, and 1/4 outputs

3 skew grades:

3-level inputs for skew and PLL range control

PLL bypass for DC testing

External feedback, internal loop filter

12mA balanced drive outputs

Low Jitter: < 200ps peak-to-peak

Industrial temperature range

Pin-to-pin compatible with IDT QS5V991 and QS5V993

Available in 32-pin PLCC and 28-pin QSOP

The PI6C3Q99X family is a high fanout 3.3V PLL-based clock driver

intended for high performance computing and data-communica-

tions applications. A key feature of the programmable skew is the

ability of outputs to lead or lag the REF input signal. The PI6C3Q991

has 8 programmable skew outputs in 4 banks of 2, while the

PI6C3Q993 has 6 programmable skew outputs and 2 zero skew

outputs. Skew is controlled by 3-level input signals that may be hard-

wired to appropriate HIGH-MID-LOW levels.

When the GND/sOE pin is held low, all the outputs are synchro-

nously enabled. However, if GND/sOE is held high, all the outputs

except 3Q0 and 3Q1 are synchronously disabled. Furthermore, when

the V

CCQ

/PE is held high, all the outputs are synchronized with the

positive edge of the REF clock input. When V

CCQ

/PE is held low,

all the outputs are synchronized with the negative edge of REF. Both

devices have LVTTL outputs with 12mA balanced drive outputs.

Pin Configurations

PI6C3Q991

REF

VCCQ

PI6C3Q993

GND

TEST

2F1

2F0

GND/sOE

1F1

1F0

VCCN

1Q0

1Q1

GND

2Q0

2Q1

3F1

4F0

4F1

VCCQ/PE

VCCN

4Q1

4Q0

GND

1 32 31 30

32-Pin

15 16 17 18 19 20

3 2

2F0

GND/sOE

1F1

1F0

VCCN

1Q0

1Q1

GND

3F0

3F1

VCCQ/PE

VCCN

4Q1

4Q0

GND

3Q1

3Q0

VCCN

28-Pin

PS8449A

10/09/00

PI6CQ3993-5Q Related Products

	PI6CQ3993-5Q	PI6CQ3993Q	PI6CQ3993-2Q	PI6CQ3993-IQ	PI6CQ3993-5IQ
Description	PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO28, QSOP-28	PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO28, QSOP-28	PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO28, QSOP-28	PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO28, QSOP-28	PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PDSO28, QSOP-28
Maker	Pericom Semiconductor Corporation (Diodes Incorporated)	Pericom Semiconductor Corporation (Diodes Incorporated)	Pericom Semiconductor Corporation (Diodes Incorporated)	Pericom Semiconductor Corporation (Diodes Incorporated)	Pericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging code	SOIC	SOIC	SOIC	SOIC	SOIC
package instruction	SOP,	SOP,	SOP,	SOP,	SOP,
Contacts	28	28	28	28	28
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G28	R-PDSO-G28	R-PDSO-G28	R-PDSO-G28	R-PDSO-G28
JESD-609 code	e0	e0	e0	e0	e0
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
Number of functions	1	1	1	1	1
Number of terminals	28	28	28	28	28
Actual output times	8	8	8	8	8
Maximum operating temperature	70 °C	70 °C	70 °C	85 °C	85 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.7 ns	1 ns	0.5 ns	1 ns	0.7 ns
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
minfmax	85 MHz	85 MHz	85 MHz	85 MHz	85 MHz
Base Number Matches	1	1	1	-	-

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