1CY7C274
CY7C271
CY7C274
32K x 8 Power Switched and
Reprogrammable PROM
Features
• CMOS for optimum speed/power
• Windowed for reprogrammability
• High speed
— 30 ns (Commercial)
— 35 ns (Military)
• Low power
— 660 mW (commercial)
•
•
•
•
•
— 715 mW (military)
Super low standby power
— Less than 165 mW when deselected
EPROM technology 100% programmable
Slim 300-mil package (7C271)
Direct replacement for bipolar PROMs
Capable of withstanding >2001V static discharge
low-power stand-by mode. The CY7C271 is packaged in the
300-mil slim package. The CY7C274 is packaged in the
industry standard 600-mil package. Both the CY7C271 and
CY7C274 are available in a cerDIP package equipped with an
erasure window to provide for reprogrammability. When
exposed to UV light, the PROM is erased and can be repro-
grammed. The memory cells utilize proven EPROM floating
gate technology and byte-wide intelligent programming
algorithms.
The CY7C271 and CY7C274 offer the advantage of lower
power, superior performance, and programming yield. The
EPROM cell requires only 12.5V for the super voltage, and low
current requirements allow for gang programming. The
EPROM cells allow each memory location to be tested 100%
because each location is written into, erased, and repeatedly
exercised prior to encapsulation. Each PROM is also tested
for AC performance to guarantee that after customer
programming, the product will meet DC and AC specification
limits.
Reading the 7C271 is accomplished by placing active LOW
signals on CS
1
and CE, and an active HIGH on CS
2
. Reading the
7C274 is accomplished by placing active LOW signals on OE and
CE. The contents of the memory location addressed by the address
lines (A
0
−A
14
) will become available on the output lines (O
0
−O
7
).
Functional Description
The CY7C271 and CY7C274 are high-performance
32,768-word by 8-bit CMOS PROMs. When disabled (CE
HIGH), the 7C271/7C274 automatically powers down into a
Logic Block Diagram
A
14
A
13
A
12
A
11
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Y ADDRESS
X ADDRESS
256 x 1024
PROGRAMABLE
ARRAY
8 x 1 OF 128
MULTIPLEXER
Pin Configurations
DIP/Flatpack
O
7
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
O
3
GND
1
2
3
4
28
27
26
V
CC
A
10
A
11
A
12
A
13
A
14
CS
1
CS
2
CE
O
7
O
6
O
5
O
4
O
3
V
PP
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
DIP/Flatpack
1
2
3
4
28
27
26
V
CC
A
14
A
13
A
8
A
9
A
11
OE
A
10
CE
O
7
O
6
O
5
O
4
O
3
O
6
O
5
25
5
24
6 7C271 23
22
7
21
8
9
10
11
12
13
14
20
19
18
17
16
15
25
5
24
6 7C274 23
22
7
21
8
9
10
11
12
13
14
20
19
18
17
16
15
O
4
LCC/PLCC (Opaque Only)
4 3 2 1 32 31 30
29
5
28
7C271
6
27
7
26
8
25
9
24
10
23
11
22
12
21
13
14151617 181920
O1
O2
GND
NC
O3
O4
O5
A7
A8
A9
NC
V
CC
A10
A11
O
2
LCC/PLCC (Opaque Only)
4 3 2 1 32 31 30
29
5
28
7C274
6
27
7
26
8
25
9
24
10
23
11
22
12
21
13
14151617 181920
O1
O2
GND
NC
O3
O4
O5
A7
A12
VPP
NC
V
CC
A14
A13
O
1
POWER-DOWN
O
0
CE
(7C271) CS
1
(7C271) CS
2
(7C274) OE
A
6
A
5
A
4
A
3
A
2
A
1
A
0
NC
O
0
A
12
A
13
A
14
NC
CS
1
CS
2
CE
O
7
O
6
A
6
A
5
A
4
A
3
A
2
A
1
A
0
NC
O
0
A
8
A
9
A
11
NC
OE
A
10
CE
O
7
O
6
Cypress Semiconductor Corporation
Document #: 38-04008 Rev. *B
•
3901 North First Street
•
San Jose
•
CA 95134 • 408-943-2600
Revised December 27, 2002
CY7C271
CY7C274
Selection Guide
7C274-30
Maximum Access Time
Maximum Operating
Current
Standby Current
Com’l
Military
Com’l
Military
30
30
120
7C271-35
7C274-35
35
120
130
30
40
7C271-45
7C274-45
45
120
130
30
40
7C271-55
55
120
130
30
40
Unit
ns
mA
mA
mA
mA
Maximum Ratings
[1]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
..................................... −65°C
to +150°C
Ambient Temperature with
Power Applied..................................................−55°C to +125°C
Supply Voltage to Ground Potential
.................−0.5V
to +7.0V
DC Voltage Applied to Outputs
in High Z State
.....................................................−0.5V
to +7.0V
DC Input Voltage
.................................................−3.0V
to +7.0V
DC Program Voltage .................................................... 13.0V
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA
UV Exposure ................................................ 7258 Wsec/cm
2
Operating Range
Range
Commercial
Military
[2]
Ambient
Temperature
0
°
C to +70
°
C
−55
°
C to +125
°
C
V
CC
5V
±10%
5V
±10%
Electrical Characteristics
Over the Operating Range
[3]
7C271- 35, 45, 55
7C274-30, 35, 45,
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB
V
PP
I
PP
V
IHP
V
ILP
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Level
Input LOW Level
Input Current
Output Leakage Current
Output Short Circuit Current
Power Supply Current
Standby Supply Current
Programming Supply Voltage
Programming Supply Current
Input HIGH Programming
Voltage
Input LOW Programming
Voltage
3.0
0.4
[5]
Test Conditions
V
CC
= Min., I
OH
=
−2.0
mA
V
CC
= Min., I
OL
= 8.0
mA
[4]
Guaranteed Input Logical HIGH Voltage for All
Inputs
Guaranteed Input Logical LOW Voltage for All
Inputs
GND < V
IN
< V
CC
GND < V
OUT
< V
CC
, Output Disabled
V
CC
= Max., V
OUT
= GND
V
CC
= Max., V
IN
= 2.0V,
I
OUT
= 0 mA, CE=V
IL
V
CC
= Max., CE = V
IH
,
I
OUT
= 0 mA
Commercial
Military
Commercial
Military
Min.
2.4
Max.
0.4
Unit
V
V
V
V
µA
µA
mA
mA
mA
V
mA
V
V
2.0
V
CC
0.8
−10
−40
−20
+10
+40
−90
120
130
30
40
12
13
50
Notes:
1. The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2. T
A
is the “instant on” case temperature.
3. See the last page of this specification for Group A subgroup testing information.
4. 6.0 mA military
5. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
Document #: 38-04008 Rev. *B
Page 2 of 11
CY7C271
CY7C274
Capacitance
[6]
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
CC
= 5.0V
Max.
10
10
Unit
pF
pF
AC Test Loads and Waveforms
[6]
R1 500Ω
658Ω MIL
5V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R2 333Ω
(403Ω MIL)
5 pF
INCLUDING
JIG AND
SCOPE
R2 333Ω
(403Ω MIL)
3.0V
GND
≤
5 ns
R1 500Ω
658Ω MIL
ALL INPUT PULSES
90%
10%
90%
10%
≤
5 ns
5V
OUTPUT
(a) Normal Load
Equivalent to:
OUTPUT
THÉVENIN EQUIVALENT
200Ω
(b) HighZ Load
250Ω
2.00V COMMERCIAL
OUTPUT
1.90V MILITARY
Switching Characteristics
Over the Operating Range
[3,6]
7C274-30
Parameter
t
AA
t
HZCS
t
ACS
t
HZOE
t
OE
t
HZCE
t
ACE
t
PU
t
PD
t
OH
Description
Address to Output Valid
Chip Select Inactive to High Z (CS
1
and CS
2
,
7C271 Only)
Chip Select Active to Output Valid (CS
1
and CS
2
,
7C271 Only)
Output Enable Inactive to High Z (OE, 7C274
Only)
Output Enable Active to Output Valid (OE, 7C274
Only)
Chip Enable Inactive to High Z (CE Only)
Chip Enable Active to Output Valid (CE Only)
Chip Enable Active to Power Up
Chip Enable Inactive to Power Down
Output Hold from Address Change
0
0
35
0
7C271-35
7C274-35
7C271-45
7C274-45
7C271-55
Unit
ns
ns
ns
ns
ns
ns
ns
ns
60
0
ns
ns
Min. Max. Min. Max. Min. Max. Min. Max.
30
20
20
20
20
35
35
0
40
0
35
25
25
20
20
40
40
0
50
45
30
30
25
25
50
50
0
55
30
30
25
25
60
60
Note:
6. See Introduction to CMOS PROMs for general information on testing.
Document #: 38-04008 Rev. *B
Page 3 of 11
CY7C271
CY7C274
Switching Waveform
t
PD
V
CC
SUPPLY
CURRENT
A
0
−
A
14
ADDRESS
50%
t
PU
POWER-DOWN CONTROLLED BY CE
50%
CS
2
OE, CE, CS
1
[7]
t
AA
t
OH
O
0
- O
7
PREVIOUS DATA VALID
(t
HZOE
)
t
HZCS(E)
DATA VALID
(t
OE
)
t
ACS(E)
HIGH Z
Note:
7. CS
2
and CS
1
are used on the 7C271 only. OE is used on the 7C274 only.
Erasure Characteristics
Wavelengths of light less than 4000 angstroms begin to erase
the CY7C271 and CY7C274 in the windowed package. For
this reason, an opaque label should be placed over the window
if the PROM is exposed to sunlight or fluorescent lighting for
extended periods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV
intensity
×
exposure time) of 25 Wsec/cm
2
. For an ultraviolet lamp
with a 12 mW/cm
2
power rating, the exposure time would be approx-
imately 35 minutes. The CY7C271 or CY7C274 needs to be within 1
Table 1. CY7C271 Mode Selection
inch of the lamp during erasure. Permanent damage may result if the
PROM is exposed to high-intensity UV light for an extended period of
time. 7258 Wsec/cm
2
is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
programming information, including a listing of software
packages, please see the PROM Programming Information
located at the end of this section. Programming algorithms can
be obtained from any Cypress representative.
Pin Function
[8]
Read or Output Disable
Mode
Read
Power Down
Output Disable
Output Disable
Program
Program Verify
Program Inhibit
Blank Check
Other
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
CE
VFY
V
IL
V
IH
X
X
V
IHP
V
ILP
V
IHP
V
ILP
CS
2
PGM
V
IH
X
V
IL
X
V
ILP
V
IHP
/V
ILP
V
IHP
V
IHP
/V
ILP
CS
1
V
PP
V
IL
X
X
V
IH
V
PP
V
PP
V
PP
V
PP
O
7
–O
0
D
7
–D
0
O
7
–O
0
High Z
High Z
High Z
D
7
–D
0
O
7
–O
0
High Z
O
7
–O
0
Document #: 38-04008 Rev. *B
Page 4 of 11
CY7C271
CY7C274
Table 2. CY7C274 Mode Selection
Pin Function
[8]
Read or Output Disable
Mode
Read
Output Disable
Power Down
Program
Program Verify
Program Inhibit
Blank Check
Note:
8. X can be V
IL
(V
ILP
) or V
IH
(V
IHP).
9. V
PP
should be tied to V
CC
±5%
in read mode.
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
A
14
–A
0
OE
VFY
V
IL
V
IH
X
V
IHP
V
ILP
V
IHP
V
ILP
CE
PGM
V
IL
X
V
IH
V
ILP
V
IHP
/V
ILP
V
IHP
V
IHP
/V
ILP
V
PP
V
PP
Note 9
X
X
V
PP
V
PP
V
PP
V
PP
O
7
–O
0
D
7
–D
0
O
7
–O
0
High Z
High Z
D
7
–D
0
O
7
–O
0
High Z
O
7
–O
0
Other
DIP
Top View
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
D
1
D
2
GND
1
2
3
4
5
7C271
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
A
10
A
11
A
12
A
13
A
14
V
PP
PGM
VFY
D
7
D
6
D
5
D
4
D
3
LCC
Top View
A7
A8
A9
NC
VCC
A10
A11
A
6
A
5
A
4
A
3
A
2
A
1
A
0
NC
D
0
4 3 2 1 32 31 30
29
5
28
6
27
7C271
7
26
8
25
9
24
10
23
11
22
12
21
13
14151617 181920
D1
D2
GND
NC
D3
D4
D5
A
12
A
13
A
14
NC
V
PP
PGM
VFY
D
7
D
6
DIP
Top View
V
PP
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
D
1
D
2
GND
1
2
3
4
5
7C274
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
A
14
A
13
A
8
A
9
A
11
VFY
A
10
PGM
D
7
D
6
D
5
D
4
D
3
LCC
Top View
A7
A12
VPP
NC
VCC
A14
A13
A
6
A
5
A
4
A
3
A
2
A
1
A
0
NC
D
0
4 3 2 1 32 31 30
29
5
28
6
7C274
27
7
26
8
25
9
24
10
23
11
22
12
21
13
14151617 181920
D1
D2
GND
NC
D3
D4
D5
A
8
A
9
A
11
NC
VFY
A
10
PGM
D
7
D
6
Figure 1. Programming Pinouts
Document #: 38-04008 Rev. *B
Page 5 of 11
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