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CY62137CV25LL-70BAIT

Description
Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
Categorystorage    storage   
File Size218KB,12 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric Compare View All

CY62137CV25LL-70BAIT Overview

Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48

CY62137CV25LL-70BAIT Parametric

Parameter NameAttribute value
Parts packaging codeBGA
package instructionTFBGA,
Contacts48
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time70 ns
JESD-30 codeS-PBGA-B48
length7 mm
memory density2097152 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals48
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX16
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeSQUARE
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.2 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
width7 mm
Base Number Matches1
CY62137CV25/30/33 MoBL
®
CY62137CV MoBL
®
2M (128K x 16) Static RAM
Features
• Very high speed: 55 ns and 70 ns
• Temperature Ranges
— Industrial: –40°C to +85°C
— Automotive: –40°C to +125°C
• Pin-compatible with the CY62137V
• Ultra-low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 5.5 mA @ f = f
max
(70-ns
speed)
Low and ultra-low standby power
Easy memory expansion with CE and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
Packages offered in a Lead-Free and Non-Lead Free
48-ball FBGA
Life™ (MoBL
®
) in portable applications such as cellular tele-
phones. The devices also has an automatic power-down fea-
ture that significantly reduces power consumption by 80%
when addresses are not toggling. The device can also be put
into standby mode reducing power consumption by more than
99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input/output pins (I/O
0
through I/O
15
) are placed
in a high-impedance state when: deselected (CE HIGH), out-
puts are disabled (OE HIGH), both Byte High Enable and Byte
Low Enable are disabled (BHE, BLE HIGH), or during a write
operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through A
16
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
0
to I/O
7
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
8
to I/O
15
. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
Functional Description
[1]
The CY62137CV25/30/33 and CY62137CV are high-perfor-
mance CMOS static RAMs organized as 128K words by 16
bits. These devices feature advanced circuit design to provide
ultra-low active current. This is ideal for providing More Battery
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
10
ROW DECODER
128K x 16
RAM Array
2048 x 1024
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
CE
BHE
BLE
A
11
Power-down
Circuit
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05201 Rev. *E
3901 North First Street
A
12
A
13
A
14
A
15
A
16
San Jose
CA 95134
• 408-943-2600
Revised April 4, 2005

CY62137CV25LL-70BAIT Related Products

CY62137CV25LL-70BAIT CY62137CVLL-70BVIT CY62137CV25LL-55BAIT CY62137CVLL-70BAIT CY62137CV25LL-70BVIT CY62137CV30LL-70BAXE
Description Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, VFBGA-48 Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, VFBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
Parts packaging code BGA BGA BGA BGA BGA BGA
package instruction TFBGA, VFBGA, TFBGA, TFBGA, VFBGA, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
Contacts 48 48 48 48 48 48
Reach Compliance Code unknown unknown unknown unknown unknown compliant
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 70 ns 70 ns 55 ns 70 ns 70 ns 70 ns
JESD-30 code S-PBGA-B48 R-PBGA-B48 S-PBGA-B48 S-PBGA-B48 R-PBGA-B48 S-PBGA-B48
length 7 mm 8 mm 7 mm 7 mm 8 mm 7 mm
memory density 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 16 16 16 16 16 16
Number of functions 1 1 1 1 1 1
Number of terminals 48 48 48 48 48 48
word count 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words
character code 128000 128000 128000 128000 128000 128000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
organize 128KX16 128KX16 128KX16 128KX16 128KX16 128KX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TFBGA VFBGA TFBGA TFBGA VFBGA TFBGA
Package shape SQUARE RECTANGULAR SQUARE SQUARE RECTANGULAR SQUARE
Package form GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 1 mm 1.2 mm 1.2 mm 1 mm 1.2 mm
Maximum supply voltage (Vsup) 2.7 V 3.6 V 2.7 V 3.6 V 2.7 V 3.3 V
Minimum supply voltage (Vsup) 2.2 V 2.7 V 2.2 V 2.7 V 2.2 V 2.7 V
Nominal supply voltage (Vsup) 2.5 V 3.3 V 2.5 V 3.3 V 2.5 V 3 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL AUTOMOTIVE
Terminal form BALL BALL BALL BALL BALL BALL
Terminal pitch 0.75 mm 0.75 mm 0.75 mm 0.75 mm 0.75 mm 0.75 mm
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
width 7 mm 6 mm 7 mm 7 mm 6 mm 7 mm
Base Number Matches 1 1 1 1 - -
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